Re-add more primops for atomic ops on byte arrays
authorJohan Tibell <johan.tibell@gmail.com>
Fri, 27 Jun 2014 11:48:24 +0000 (13:48 +0200)
committerJohan Tibell <johan.tibell@gmail.com>
Mon, 30 Jun 2014 20:12:45 +0000 (22:12 +0200)
commit4ee4ab01c1d97845aecb7707ad2f9a80933e7a49
tree08991e97b0109b81447968ba62e4753e8209a738
parentaed1723f97e0539d5ab35222b180c1552a5f4cfc
Re-add more primops for atomic ops on byte arrays

This is the second attempt to add this functionality. The first
attempt was reverted in 950fcae46a82569e7cd1fba1637a23b419e00ecd, due
to register allocator failure on x86. Given how the register
allocator currently works, we don't have enough registers on x86 to
support cmpxchg using complicated addressing modes. Instead we fall
back to a simpler addressing mode on x86.

Adds the following primops:

 * atomicReadIntArray#
 * atomicWriteIntArray#
 * fetchSubIntArray#
 * fetchOrIntArray#
 * fetchXorIntArray#
 * fetchAndIntArray#

Makes these pre-existing out-of-line primops inline:

 * fetchAddIntArray#
 * casIntArray#
22 files changed:
compiler/cmm/CmmMachOp.hs
compiler/cmm/CmmSink.hs
compiler/cmm/PprC.hs
compiler/codeGen/StgCmmPrim.hs
compiler/llvmGen/Llvm/AbsSyn.hs
compiler/llvmGen/Llvm/PpLlvm.hs
compiler/llvmGen/LlvmCodeGen/CodeGen.hs
compiler/nativeGen/CPrim.hs
compiler/nativeGen/PPC/CodeGen.hs
compiler/nativeGen/SPARC/CodeGen.hs
compiler/nativeGen/X86/CodeGen.hs
compiler/nativeGen/X86/Instr.hs
compiler/nativeGen/X86/Ppr.hs
compiler/prelude/primops.txt.pp
includes/stg/MiscClosures.h
libraries/ghc-prim/cbits/atomic.c [new file with mode: 0644]
libraries/ghc-prim/ghc-prim.cabal
rts/Linker.c
rts/PrimOps.cmm
testsuite/tests/concurrent/should_run/AtomicPrimops.hs [new file with mode: 0644]
testsuite/tests/concurrent/should_run/AtomicPrimops.stdout [new file with mode: 0644]
testsuite/tests/concurrent/should_run/all.T