Add support for passing SSE vectors in registers.
authorGeoffrey Mainland <gmainlan@microsoft.com>
Wed, 31 Oct 2012 15:42:01 +0000 (15:42 +0000)
committerGeoffrey Mainland <gmainlan@microsoft.com>
Fri, 1 Feb 2013 22:00:24 +0000 (22:00 +0000)
commit33bfc6a700eaab9bc06974d6f71a80e61d9177c9
tree842bf82b7dbdafe04820349e5e991800a3cf0646
parent1811440833da92eefd7b7255915855fddc64994c
Add support for passing SSE vectors in registers.

This patch adds support for 6 XMM registers on x86-64 which overlap with the F
and D registers and may hold 128-bit wide SIMD vectors. Because there is not a
good way to attach type information to STG registers, we aggressively bitcast in
the LLVM back-end.
16 files changed:
compiler/cmm/CmmCallConv.hs
compiler/cmm/CmmExpr.hs
compiler/cmm/CmmMachOp.hs
compiler/cmm/PprC.hs
compiler/cmm/PprCmmExpr.hs
compiler/codeGen/CgUtils.hs
compiler/codeGen/StgCmmPrim.hs
compiler/llvmGen/LlvmCodeGen/Base.hs
compiler/llvmGen/LlvmCodeGen/CodeGen.hs
compiler/llvmGen/LlvmCodeGen/Regs.hs
compiler/nativeGen/X86/CodeGen.hs
includes/CodeGen.Platform.hs
includes/stg/MachRegs.h
includes/stg/Regs.h
includes/stg/Types.h
utils/deriveConstants/DeriveConstants.hs