Make clearNursery free
[ghc.git] / includes / CodeGen.Platform.hs
1
2 import CmmExpr
3 import FastBool
4 #if !(MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc)
5 import Panic
6 #endif
7 import Reg
8
9 #include "ghcautoconf.h"
10 #include "stg/MachRegs.h"
11
12 #if MACHREGS_i386 || MACHREGS_x86_64
13
14 # if MACHREGS_i386
15 # define eax 0
16 # define ebx 1
17 # define ecx 2
18 # define edx 3
19 # define esi 4
20 # define edi 5
21 # define ebp 6
22 # define esp 7
23 # endif
24
25 # if MACHREGS_x86_64
26 # define rax 0
27 # define rbx 1
28 # define rcx 2
29 # define rdx 3
30 # define rsi 4
31 # define rdi 5
32 # define rbp 6
33 # define rsp 7
34 # define r8 8
35 # define r9 9
36 # define r10 10
37 # define r11 11
38 # define r12 12
39 # define r13 13
40 # define r14 14
41 # define r15 15
42 # endif
43
44 # define fake0 16
45 # define fake1 17
46 # define fake2 18
47 # define fake3 19
48 # define fake4 20
49 # define fake5 21
50
51 # define xmm0 24
52 # define xmm1 25
53 # define xmm2 26
54 # define xmm3 27
55 # define xmm4 28
56 # define xmm5 29
57 # define xmm6 30
58 # define xmm7 31
59 # define xmm8 32
60 # define xmm9 33
61 # define xmm10 34
62 # define xmm11 35
63 # define xmm12 36
64 # define xmm13 37
65 # define xmm14 38
66 # define xmm15 39
67
68 # define ymm0 40
69 # define ymm1 41
70 # define ymm2 42
71 # define ymm3 43
72 # define ymm4 44
73 # define ymm5 45
74 # define ymm6 46
75 # define ymm7 47
76 # define ymm8 48
77 # define ymm9 49
78 # define ymm10 50
79 # define ymm11 51
80 # define ymm12 52
81 # define ymm13 53
82 # define ymm14 54
83 # define ymm15 55
84
85 # define zmm0 56
86 # define zmm1 57
87 # define zmm2 58
88 # define zmm3 59
89 # define zmm4 60
90 # define zmm5 61
91 # define zmm6 62
92 # define zmm7 63
93 # define zmm8 64
94 # define zmm9 65
95 # define zmm10 66
96 # define zmm11 67
97 # define zmm12 68
98 # define zmm13 69
99 # define zmm14 70
100 # define zmm15 71
101
102 -- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs.
103 -- Since it's only used to check 'isJust', the actual values don't matter, thus
104 -- I'm not sure if these are the correct numberings.
105 -- Normally, the register names are just stringified as part of the REG() macro
106
107 #elif MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
108
109 # define r0 0
110 # define r1 1
111 # define r2 2
112 # define r3 3
113 # define r4 4
114 # define r5 5
115 # define r6 6
116 # define r7 7
117 # define r8 8
118 # define r9 9
119 # define r10 10
120 # define r11 11
121 # define r12 12
122 # define r13 13
123 # define r14 14
124 # define r15 15
125 # define r16 16
126 # define r17 17
127 # define r18 18
128 # define r19 19
129 # define r20 20
130 # define r21 21
131 # define r22 22
132 # define r23 23
133 # define r24 24
134 # define r25 25
135 # define r26 26
136 # define r27 27
137 # define r28 28
138 # define r29 29
139 # define r30 30
140 # define r31 31
141
142 -- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe
143 -- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG.
144 #if MACHREGS_aarch64 || MACHREGS_arm
145 # define s0 32
146 # define s1 33
147 # define s2 34
148 # define s3 35
149 # define s4 36
150 # define s5 37
151 # define s6 38
152 # define s7 39
153 # define s8 40
154 # define s9 41
155 # define s10 42
156 # define s11 43
157 # define s12 44
158 # define s13 45
159 # define s14 46
160 # define s15 47
161 # define s16 48
162 # define s17 49
163 # define s18 50
164 # define s19 51
165 # define s20 52
166 # define s21 53
167 # define s22 54
168 # define s23 55
169 # define s24 56
170 # define s25 57
171 # define s26 58
172 # define s27 59
173 # define s28 60
174 # define s29 61
175 # define s30 62
176 # define s31 63
177
178 # define d0 32
179 # define d1 33
180 # define d2 34
181 # define d3 35
182 # define d4 36
183 # define d5 37
184 # define d6 38
185 # define d7 39
186 # define d8 40
187 # define d9 41
188 # define d10 42
189 # define d11 43
190 # define d12 44
191 # define d13 45
192 # define d14 46
193 # define d15 47
194 # define d16 48
195 # define d17 49
196 # define d18 50
197 # define d19 51
198 # define d20 52
199 # define d21 53
200 # define d22 54
201 # define d23 55
202 # define d24 56
203 # define d25 57
204 # define d26 58
205 # define d27 59
206 # define d28 60
207 # define d29 61
208 # define d30 62
209 # define d31 63
210 #endif
211
212 # if MACHREGS_darwin
213 # define f0 32
214 # define f1 33
215 # define f2 34
216 # define f3 35
217 # define f4 36
218 # define f5 37
219 # define f6 38
220 # define f7 39
221 # define f8 40
222 # define f9 41
223 # define f10 42
224 # define f11 43
225 # define f12 44
226 # define f13 45
227 # define f14 46
228 # define f15 47
229 # define f16 48
230 # define f17 49
231 # define f18 50
232 # define f19 51
233 # define f20 52
234 # define f21 53
235 # define f22 54
236 # define f23 55
237 # define f24 56
238 # define f25 57
239 # define f26 58
240 # define f27 59
241 # define f28 60
242 # define f29 61
243 # define f30 62
244 # define f31 63
245 # else
246 # define fr0 32
247 # define fr1 33
248 # define fr2 34
249 # define fr3 35
250 # define fr4 36
251 # define fr5 37
252 # define fr6 38
253 # define fr7 39
254 # define fr8 40
255 # define fr9 41
256 # define fr10 42
257 # define fr11 43
258 # define fr12 44
259 # define fr13 45
260 # define fr14 46
261 # define fr15 47
262 # define fr16 48
263 # define fr17 49
264 # define fr18 50
265 # define fr19 51
266 # define fr20 52
267 # define fr21 53
268 # define fr22 54
269 # define fr23 55
270 # define fr24 56
271 # define fr25 57
272 # define fr26 58
273 # define fr27 59
274 # define fr28 60
275 # define fr29 61
276 # define fr30 62
277 # define fr31 63
278 # endif
279
280 #elif MACHREGS_sparc
281
282 # define g0 0
283 # define g1 1
284 # define g2 2
285 # define g3 3
286 # define g4 4
287 # define g5 5
288 # define g6 6
289 # define g7 7
290
291 # define o0 8
292 # define o1 9
293 # define o2 10
294 # define o3 11
295 # define o4 12
296 # define o5 13
297 # define o6 14
298 # define o7 15
299
300 # define l0 16
301 # define l1 17
302 # define l2 18
303 # define l3 19
304 # define l4 20
305 # define l5 21
306 # define l6 22
307 # define l7 23
308
309 # define i0 24
310 # define i1 25
311 # define i2 26
312 # define i3 27
313 # define i4 28
314 # define i5 29
315 # define i6 30
316 # define i7 31
317
318 # define f0 32
319 # define f1 33
320 # define f2 34
321 # define f3 35
322 # define f4 36
323 # define f5 37
324 # define f6 38
325 # define f7 39
326 # define f8 40
327 # define f9 41
328 # define f10 42
329 # define f11 43
330 # define f12 44
331 # define f13 45
332 # define f14 46
333 # define f15 47
334 # define f16 48
335 # define f17 49
336 # define f18 50
337 # define f19 51
338 # define f20 52
339 # define f21 53
340 # define f22 54
341 # define f23 55
342 # define f24 56
343 # define f25 57
344 # define f26 58
345 # define f27 59
346 # define f28 60
347 # define f29 61
348 # define f30 62
349 # define f31 63
350
351 #endif
352
353 callerSaves :: GlobalReg -> Bool
354 #ifdef CALLER_SAVES_Base
355 callerSaves BaseReg = True
356 #endif
357 #ifdef CALLER_SAVES_R1
358 callerSaves (VanillaReg 1 _) = True
359 #endif
360 #ifdef CALLER_SAVES_R2
361 callerSaves (VanillaReg 2 _) = True
362 #endif
363 #ifdef CALLER_SAVES_R3
364 callerSaves (VanillaReg 3 _) = True
365 #endif
366 #ifdef CALLER_SAVES_R4
367 callerSaves (VanillaReg 4 _) = True
368 #endif
369 #ifdef CALLER_SAVES_R5
370 callerSaves (VanillaReg 5 _) = True
371 #endif
372 #ifdef CALLER_SAVES_R6
373 callerSaves (VanillaReg 6 _) = True
374 #endif
375 #ifdef CALLER_SAVES_R7
376 callerSaves (VanillaReg 7 _) = True
377 #endif
378 #ifdef CALLER_SAVES_R8
379 callerSaves (VanillaReg 8 _) = True
380 #endif
381 #ifdef CALLER_SAVES_R9
382 callerSaves (VanillaReg 9 _) = True
383 #endif
384 #ifdef CALLER_SAVES_R10
385 callerSaves (VanillaReg 10 _) = True
386 #endif
387 #ifdef CALLER_SAVES_F1
388 callerSaves (FloatReg 1) = True
389 #endif
390 #ifdef CALLER_SAVES_F2
391 callerSaves (FloatReg 2) = True
392 #endif
393 #ifdef CALLER_SAVES_F3
394 callerSaves (FloatReg 3) = True
395 #endif
396 #ifdef CALLER_SAVES_F4
397 callerSaves (FloatReg 4) = True
398 #endif
399 #ifdef CALLER_SAVES_F5
400 callerSaves (FloatReg 5) = True
401 #endif
402 #ifdef CALLER_SAVES_F6
403 callerSaves (FloatReg 6) = True
404 #endif
405 #ifdef CALLER_SAVES_D1
406 callerSaves (DoubleReg 1) = True
407 #endif
408 #ifdef CALLER_SAVES_D2
409 callerSaves (DoubleReg 2) = True
410 #endif
411 #ifdef CALLER_SAVES_D3
412 callerSaves (DoubleReg 3) = True
413 #endif
414 #ifdef CALLER_SAVES_D4
415 callerSaves (DoubleReg 4) = True
416 #endif
417 #ifdef CALLER_SAVES_D5
418 callerSaves (DoubleReg 5) = True
419 #endif
420 #ifdef CALLER_SAVES_D6
421 callerSaves (DoubleReg 6) = True
422 #endif
423 #ifdef CALLER_SAVES_L1
424 callerSaves (LongReg 1) = True
425 #endif
426 #ifdef CALLER_SAVES_Sp
427 callerSaves Sp = True
428 #endif
429 #ifdef CALLER_SAVES_SpLim
430 callerSaves SpLim = True
431 #endif
432 #ifdef CALLER_SAVES_Hp
433 callerSaves Hp = True
434 #endif
435 #ifdef CALLER_SAVES_HpLim
436 callerSaves HpLim = True
437 #endif
438 #ifdef CALLER_SAVES_CCCS
439 callerSaves CCCS = True
440 #endif
441 #ifdef CALLER_SAVES_CurrentTSO
442 callerSaves CurrentTSO = True
443 #endif
444 #ifdef CALLER_SAVES_CurrentNursery
445 callerSaves CurrentNursery = True
446 #endif
447 callerSaves _ = False
448
449 activeStgRegs :: [GlobalReg]
450 activeStgRegs = [
451 #ifdef REG_Base
452 BaseReg
453 #endif
454 #ifdef REG_Sp
455 ,Sp
456 #endif
457 #ifdef REG_Hp
458 ,Hp
459 #endif
460 #ifdef REG_R1
461 ,VanillaReg 1 VGcPtr
462 #endif
463 #ifdef REG_R2
464 ,VanillaReg 2 VGcPtr
465 #endif
466 #ifdef REG_R3
467 ,VanillaReg 3 VGcPtr
468 #endif
469 #ifdef REG_R4
470 ,VanillaReg 4 VGcPtr
471 #endif
472 #ifdef REG_R5
473 ,VanillaReg 5 VGcPtr
474 #endif
475 #ifdef REG_R6
476 ,VanillaReg 6 VGcPtr
477 #endif
478 #ifdef REG_R7
479 ,VanillaReg 7 VGcPtr
480 #endif
481 #ifdef REG_R8
482 ,VanillaReg 8 VGcPtr
483 #endif
484 #ifdef REG_R9
485 ,VanillaReg 9 VGcPtr
486 #endif
487 #ifdef REG_R10
488 ,VanillaReg 10 VGcPtr
489 #endif
490 #ifdef REG_SpLim
491 ,SpLim
492 #endif
493 #if MAX_REAL_XMM_REG != 0
494 #ifdef REG_F1
495 ,FloatReg 1
496 #endif
497 #ifdef REG_D1
498 ,DoubleReg 1
499 #endif
500 #ifdef REG_XMM1
501 ,XmmReg 1
502 #endif
503 #ifdef REG_YMM1
504 ,YmmReg 1
505 #endif
506 #ifdef REG_ZMM1
507 ,ZmmReg 1
508 #endif
509 #ifdef REG_F2
510 ,FloatReg 2
511 #endif
512 #ifdef REG_D2
513 ,DoubleReg 2
514 #endif
515 #ifdef REG_XMM2
516 ,XmmReg 2
517 #endif
518 #ifdef REG_YMM2
519 ,YmmReg 2
520 #endif
521 #ifdef REG_ZMM2
522 ,ZmmReg 2
523 #endif
524 #ifdef REG_F3
525 ,FloatReg 3
526 #endif
527 #ifdef REG_D3
528 ,DoubleReg 3
529 #endif
530 #ifdef REG_XMM3
531 ,XmmReg 3
532 #endif
533 #ifdef REG_YMM3
534 ,YmmReg 3
535 #endif
536 #ifdef REG_ZMM3
537 ,ZmmReg 3
538 #endif
539 #ifdef REG_F4
540 ,FloatReg 4
541 #endif
542 #ifdef REG_D4
543 ,DoubleReg 4
544 #endif
545 #ifdef REG_XMM4
546 ,XmmReg 4
547 #endif
548 #ifdef REG_YMM4
549 ,YmmReg 4
550 #endif
551 #ifdef REG_ZMM4
552 ,ZmmReg 4
553 #endif
554 #ifdef REG_F5
555 ,FloatReg 5
556 #endif
557 #ifdef REG_D5
558 ,DoubleReg 5
559 #endif
560 #ifdef REG_XMM5
561 ,XmmReg 5
562 #endif
563 #ifdef REG_YMM5
564 ,YmmReg 5
565 #endif
566 #ifdef REG_ZMM5
567 ,ZmmReg 5
568 #endif
569 #ifdef REG_F6
570 ,FloatReg 6
571 #endif
572 #ifdef REG_D6
573 ,DoubleReg 6
574 #endif
575 #ifdef REG_XMM6
576 ,XmmReg 6
577 #endif
578 #ifdef REG_YMM6
579 ,YmmReg 6
580 #endif
581 #ifdef REG_ZMM6
582 ,ZmmReg 6
583 #endif
584 #else /* MAX_REAL_XMM_REG == 0 */
585 #ifdef REG_F1
586 ,FloatReg 1
587 #endif
588 #ifdef REG_F2
589 ,FloatReg 2
590 #endif
591 #ifdef REG_F3
592 ,FloatReg 3
593 #endif
594 #ifdef REG_F4
595 ,FloatReg 4
596 #endif
597 #ifdef REG_F5
598 ,FloatReg 5
599 #endif
600 #ifdef REG_F6
601 ,FloatReg 6
602 #endif
603 #ifdef REG_D1
604 ,DoubleReg 1
605 #endif
606 #ifdef REG_D2
607 ,DoubleReg 2
608 #endif
609 #ifdef REG_D3
610 ,DoubleReg 3
611 #endif
612 #ifdef REG_D4
613 ,DoubleReg 4
614 #endif
615 #ifdef REG_D5
616 ,DoubleReg 5
617 #endif
618 #ifdef REG_D6
619 ,DoubleReg 6
620 #endif
621 #endif /* MAX_REAL_XMM_REG == 0 */
622 ]
623
624 haveRegBase :: Bool
625 #ifdef REG_Base
626 haveRegBase = True
627 #else
628 haveRegBase = False
629 #endif
630
631 -- | Returns 'Nothing' if this global register is not stored
632 -- in a real machine register, otherwise returns @'Just' reg@, where
633 -- reg is the machine register it is stored in.
634 globalRegMaybe :: GlobalReg -> Maybe RealReg
635 #if MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
636 # ifdef REG_Base
637 globalRegMaybe BaseReg = Just (RealRegSingle REG_Base)
638 # endif
639 # ifdef REG_R1
640 globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1)
641 # endif
642 # ifdef REG_R2
643 globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2)
644 # endif
645 # ifdef REG_R3
646 globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3)
647 # endif
648 # ifdef REG_R4
649 globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4)
650 # endif
651 # ifdef REG_R5
652 globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5)
653 # endif
654 # ifdef REG_R6
655 globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6)
656 # endif
657 # ifdef REG_R7
658 globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7)
659 # endif
660 # ifdef REG_R8
661 globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8)
662 # endif
663 # ifdef REG_R9
664 globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9)
665 # endif
666 # ifdef REG_R10
667 globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10)
668 # endif
669 # ifdef REG_F1
670 globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1)
671 # endif
672 # ifdef REG_F2
673 globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2)
674 # endif
675 # ifdef REG_F3
676 globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3)
677 # endif
678 # ifdef REG_F4
679 globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4)
680 # endif
681 # ifdef REG_F5
682 globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5)
683 # endif
684 # ifdef REG_F6
685 globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6)
686 # endif
687 # ifdef REG_D1
688 globalRegMaybe (DoubleReg 1) =
689 # if MACHREGS_sparc
690 Just (RealRegPair REG_D1 (REG_D1 + 1))
691 # else
692 Just (RealRegSingle REG_D1)
693 # endif
694 # endif
695 # ifdef REG_D2
696 globalRegMaybe (DoubleReg 2) =
697 # if MACHREGS_sparc
698 Just (RealRegPair REG_D2 (REG_D2 + 1))
699 # else
700 Just (RealRegSingle REG_D2)
701 # endif
702 # endif
703 # ifdef REG_D3
704 globalRegMaybe (DoubleReg 3) =
705 # if MACHREGS_sparc
706 Just (RealRegPair REG_D3 (REG_D3 + 1))
707 # else
708 Just (RealRegSingle REG_D3)
709 # endif
710 # endif
711 # ifdef REG_D4
712 globalRegMaybe (DoubleReg 4) =
713 # if MACHREGS_sparc
714 Just (RealRegPair REG_D4 (REG_D4 + 1))
715 # else
716 Just (RealRegSingle REG_D4)
717 # endif
718 # endif
719 # ifdef REG_D5
720 globalRegMaybe (DoubleReg 5) =
721 # if MACHREGS_sparc
722 Just (RealRegPair REG_D5 (REG_D5 + 1))
723 # else
724 Just (RealRegSingle REG_D5)
725 # endif
726 # endif
727 # ifdef REG_D6
728 globalRegMaybe (DoubleReg 6) =
729 # if MACHREGS_sparc
730 Just (RealRegPair REG_D6 (REG_D6 + 1))
731 # else
732 Just (RealRegSingle REG_D6)
733 # endif
734 # endif
735 # if MAX_REAL_XMM_REG != 0
736 # ifdef REG_XMM1
737 globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1)
738 # endif
739 # ifdef REG_XMM2
740 globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2)
741 # endif
742 # ifdef REG_XMM3
743 globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3)
744 # endif
745 # ifdef REG_XMM4
746 globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4)
747 # endif
748 # ifdef REG_XMM5
749 globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5)
750 # endif
751 # ifdef REG_XMM6
752 globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6)
753 # endif
754 # endif
755 # if MAX_REAL_YMM_REG != 0
756 # ifdef REG_YMM1
757 globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1)
758 # endif
759 # ifdef REG_YMM2
760 globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2)
761 # endif
762 # ifdef REG_YMM3
763 globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3)
764 # endif
765 # ifdef REG_YMM4
766 globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4)
767 # endif
768 # ifdef REG_YMM5
769 globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5)
770 # endif
771 # ifdef REG_YMM6
772 globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6)
773 # endif
774 # endif
775 # if MAX_REAL_ZMM_REG != 0
776 # ifdef REG_ZMM1
777 globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1)
778 # endif
779 # ifdef REG_ZMM2
780 globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2)
781 # endif
782 # ifdef REG_ZMM3
783 globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3)
784 # endif
785 # ifdef REG_ZMM4
786 globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4)
787 # endif
788 # ifdef REG_ZMM5
789 globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5)
790 # endif
791 # ifdef REG_ZMM6
792 globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6)
793 # endif
794 # endif
795 # ifdef REG_Sp
796 globalRegMaybe Sp = Just (RealRegSingle REG_Sp)
797 # endif
798 # ifdef REG_Lng1
799 globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1)
800 # endif
801 # ifdef REG_Lng2
802 globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2)
803 # endif
804 # ifdef REG_SpLim
805 globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim)
806 # endif
807 # ifdef REG_Hp
808 globalRegMaybe Hp = Just (RealRegSingle REG_Hp)
809 # endif
810 # ifdef REG_HpLim
811 globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim)
812 # endif
813 # ifdef REG_CurrentTSO
814 globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO)
815 # endif
816 # ifdef REG_CurrentNursery
817 globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery)
818 # endif
819 globalRegMaybe _ = Nothing
820 #elif MACHREGS_NO_REGS
821 globalRegMaybe _ = Nothing
822 #else
823 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
824 #endif
825
826 freeReg :: RegNo -> FastBool
827
828 #if MACHREGS_i386 || MACHREGS_x86_64
829
830 # if MACHREGS_i386
831 freeReg esp = fastBool False -- %esp is the C stack pointer
832 freeReg esi = fastBool False -- Note [esi/edi not allocatable]
833 freeReg edi = fastBool False
834 # endif
835 # if MACHREGS_x86_64
836 freeReg rsp = fastBool False -- %rsp is the C stack pointer
837 # endif
838
839 {-
840 Note [esi/edi not allocatable]
841
842 %esi is mapped to R1, so %esi would normally be allocatable while it
843 is not being used for R1. However, %esi has no 8-bit version on x86,
844 and the linear register allocator is not sophisticated enough to
845 handle this irregularity (we need more RegClasses). The
846 graph-colouring allocator also cannot handle this - it was designed
847 with more flexibility in mind, but the current implementation is
848 restricted to the same set of classes as the linear allocator.
849
850 Hence, on x86 esi and edi are treated as not allocatable.
851 -}
852
853 -- split patterns in two functions to prevent overlaps
854 freeReg r = freeRegBase r
855
856 freeRegBase :: RegNo -> FastBool
857 # ifdef REG_Base
858 freeRegBase REG_Base = fastBool False
859 # endif
860 # ifdef REG_Sp
861 freeRegBase REG_Sp = fastBool False
862 # endif
863 # ifdef REG_SpLim
864 freeRegBase REG_SpLim = fastBool False
865 # endif
866 # ifdef REG_Hp
867 freeRegBase REG_Hp = fastBool False
868 # endif
869 # ifdef REG_HpLim
870 freeRegBase REG_HpLim = fastBool False
871 # endif
872 -- All other regs are considered to be "free", because we can track
873 -- their liveness accurately.
874 freeRegBase _ = fastBool True
875
876 #elif MACHREGS_powerpc
877
878 freeReg 0 = fastBool False -- Hack: r0 can't be used in all insns,
879 -- but it's actually free
880 freeReg 1 = fastBool False -- The Stack Pointer
881 # if !MACHREGS_darwin
882 -- most non-darwin powerpc OSes use r2 as a TOC pointer or something like that
883 freeReg 2 = fastBool False
884 # endif
885 # ifdef REG_Base
886 freeReg REG_Base = fastBool False
887 # endif
888 # ifdef REG_R1
889 freeReg REG_R1 = fastBool False
890 # endif
891 # ifdef REG_R2
892 freeReg REG_R2 = fastBool False
893 # endif
894 # ifdef REG_R3
895 freeReg REG_R3 = fastBool False
896 # endif
897 # ifdef REG_R4
898 freeReg REG_R4 = fastBool False
899 # endif
900 # ifdef REG_R5
901 freeReg REG_R5 = fastBool False
902 # endif
903 # ifdef REG_R6
904 freeReg REG_R6 = fastBool False
905 # endif
906 # ifdef REG_R7
907 freeReg REG_R7 = fastBool False
908 # endif
909 # ifdef REG_R8
910 freeReg REG_R8 = fastBool False
911 # endif
912 # ifdef REG_R9
913 freeReg REG_R9 = fastBool False
914 # endif
915 # ifdef REG_R10
916 freeReg REG_R10 = fastBool False
917 # endif
918 # ifdef REG_F1
919 freeReg REG_F1 = fastBool False
920 # endif
921 # ifdef REG_F2
922 freeReg REG_F2 = fastBool False
923 # endif
924 # ifdef REG_F3
925 freeReg REG_F3 = fastBool False
926 # endif
927 # ifdef REG_F4
928 freeReg REG_F4 = fastBool False
929 # endif
930 # ifdef REG_F5
931 freeReg REG_F5 = fastBool False
932 # endif
933 # ifdef REG_F6
934 freeReg REG_F6 = fastBool False
935 # endif
936 # ifdef REG_D1
937 freeReg REG_D1 = fastBool False
938 # endif
939 # ifdef REG_D2
940 freeReg REG_D2 = fastBool False
941 # endif
942 # ifdef REG_D3
943 freeReg REG_D3 = fastBool False
944 # endif
945 # ifdef REG_D4
946 freeReg REG_D4 = fastBool False
947 # endif
948 # ifdef REG_D5
949 freeReg REG_D5 = fastBool False
950 # endif
951 # ifdef REG_D6
952 freeReg REG_D6 = fastBool False
953 # endif
954 # ifdef REG_Sp
955 freeReg REG_Sp = fastBool False
956 # endif
957 # ifdef REG_Su
958 freeReg REG_Su = fastBool False
959 # endif
960 # ifdef REG_SpLim
961 freeReg REG_SpLim = fastBool False
962 # endif
963 # ifdef REG_Hp
964 freeReg REG_Hp = fastBool False
965 # endif
966 # ifdef REG_HpLim
967 freeReg REG_HpLim = fastBool False
968 # endif
969 freeReg _ = fastBool True
970
971 #elif MACHREGS_sparc
972
973 -- SPARC regs used by the OS / ABI
974 -- %g0(r0) is always zero
975 freeReg g0 = fastBool False
976
977 -- %g5(r5) - %g7(r7)
978 -- are reserved for the OS
979 freeReg g5 = fastBool False
980 freeReg g6 = fastBool False
981 freeReg g7 = fastBool False
982
983 -- %o6(r14)
984 -- is the C stack pointer
985 freeReg o6 = fastBool False
986
987 -- %o7(r15)
988 -- holds the C return address
989 freeReg o7 = fastBool False
990
991 -- %i6(r30)
992 -- is the C frame pointer
993 freeReg i6 = fastBool False
994
995 -- %i7(r31)
996 -- is used for C return addresses
997 freeReg i7 = fastBool False
998
999 -- %f0(r32) - %f1(r32)
1000 -- are C floating point return regs
1001 freeReg f0 = fastBool False
1002 freeReg f1 = fastBool False
1003
1004 {-
1005 freeReg regNo
1006 -- don't release high half of double regs
1007 | regNo >= f0
1008 , regNo < NCG_FirstFloatReg
1009 , regNo `mod` 2 /= 0
1010 = fastBool False
1011 -}
1012
1013 # ifdef REG_Base
1014 freeReg REG_Base = fastBool False
1015 # endif
1016 # ifdef REG_R1
1017 freeReg REG_R1 = fastBool False
1018 # endif
1019 # ifdef REG_R2
1020 freeReg REG_R2 = fastBool False
1021 # endif
1022 # ifdef REG_R3
1023 freeReg REG_R3 = fastBool False
1024 # endif
1025 # ifdef REG_R4
1026 freeReg REG_R4 = fastBool False
1027 # endif
1028 # ifdef REG_R5
1029 freeReg REG_R5 = fastBool False
1030 # endif
1031 # ifdef REG_R6
1032 freeReg REG_R6 = fastBool False
1033 # endif
1034 # ifdef REG_R7
1035 freeReg REG_R7 = fastBool False
1036 # endif
1037 # ifdef REG_R8
1038 freeReg REG_R8 = fastBool False
1039 # endif
1040 # ifdef REG_R9
1041 freeReg REG_R9 = fastBool False
1042 # endif
1043 # ifdef REG_R10
1044 freeReg REG_R10 = fastBool False
1045 # endif
1046 # ifdef REG_F1
1047 freeReg REG_F1 = fastBool False
1048 # endif
1049 # ifdef REG_F2
1050 freeReg REG_F2 = fastBool False
1051 # endif
1052 # ifdef REG_F3
1053 freeReg REG_F3 = fastBool False
1054 # endif
1055 # ifdef REG_F4
1056 freeReg REG_F4 = fastBool False
1057 # endif
1058 # ifdef REG_F5
1059 freeReg REG_F5 = fastBool False
1060 # endif
1061 # ifdef REG_F6
1062 freeReg REG_F6 = fastBool False
1063 # endif
1064 # ifdef REG_D1
1065 freeReg REG_D1 = fastBool False
1066 # endif
1067 # ifdef REG_D1_2
1068 freeReg REG_D1_2 = fastBool False
1069 # endif
1070 # ifdef REG_D2
1071 freeReg REG_D2 = fastBool False
1072 # endif
1073 # ifdef REG_D2_2
1074 freeReg REG_D2_2 = fastBool False
1075 # endif
1076 # ifdef REG_D3
1077 freeReg REG_D3 = fastBool False
1078 # endif
1079 # ifdef REG_D3_2
1080 freeReg REG_D3_2 = fastBool False
1081 # endif
1082 # ifdef REG_D4
1083 freeReg REG_D4 = fastBool False
1084 # endif
1085 # ifdef REG_D4_2
1086 freeReg REG_D4_2 = fastBool False
1087 # endif
1088 # ifdef REG_D5
1089 freeReg REG_D5 = fastBool False
1090 # endif
1091 # ifdef REG_D5_2
1092 freeReg REG_D5_2 = fastBool False
1093 # endif
1094 # ifdef REG_D6
1095 freeReg REG_D6 = fastBool False
1096 # endif
1097 # ifdef REG_D6_2
1098 freeReg REG_D6_2 = fastBool False
1099 # endif
1100 # ifdef REG_Sp
1101 freeReg REG_Sp = fastBool False
1102 # endif
1103 # ifdef REG_Su
1104 freeReg REG_Su = fastBool False
1105 # endif
1106 # ifdef REG_SpLim
1107 freeReg REG_SpLim = fastBool False
1108 # endif
1109 # ifdef REG_Hp
1110 freeReg REG_Hp = fastBool False
1111 # endif
1112 # ifdef REG_HpLim
1113 freeReg REG_HpLim = fastBool False
1114 # endif
1115 freeReg _ = fastBool True
1116
1117 #else
1118
1119 freeReg = panic "freeReg not defined for this platform"
1120
1121 #endif
1122