linker: store entire link map and use it.
[ghc.git] / rts / linker / Elf.c
1 #include "Rts.h"
2
3 #if defined(linux_HOST_OS) || defined(solaris2_HOST_OS) \
4 || defined(linux_android_HOST_OS) \
5 || defined(freebsd_HOST_OS) || defined(kfreebsdgnu_HOST_OS) \
6 || defined(dragonfly_HOST_OS) || defined(netbsd_HOST_OS) \
7 || defined(openbsd_HOST_OS) || defined(gnu_HOST_OS)
8
9 // It is essential that this is included before any <elf.h> is included. <elf.h>
10 // defines R_XXX relocations, which would interfere with the COMPAT_R_XXX
11 // relocations we generate. E.g. COMPAT_ ## R_ARM_ARM32 would end up as
12 // const unsigned COMPAT_3 = 0x03; instead of
13 // const unsigned COMPAT_R_ARM_ARM32 = 0x03;
14 #include "elf_compat.h"
15
16 #include "RtsUtils.h"
17 #include "RtsSymbolInfo.h"
18 #include "linker/Elf.h"
19 #include "linker/CacheFlush.h"
20 #include "linker/M32Alloc.h"
21 #include "linker/SymbolExtras.h"
22 #include "sm/OSMem.h"
23 #include "GetEnv.h"
24 #include "linker/util.h"
25 #include "linker/elf_util.h"
26
27 #include <stdlib.h>
28 #include <string.h>
29 #if defined(HAVE_SYS_STAT_H)
30 #include <sys/stat.h>
31 #endif
32 #if defined(HAVE_SYS_TYPES_H)
33 #include <sys/types.h>
34 #endif
35 #if defined(HAVE_FCNTL_H)
36 #include <fcntl.h>
37 #endif
38 #if defined(dragonfly_HOST_OS)
39 #include <sys/tls.h>
40 #endif
41
42 /* on x86_64 we have a problem with relocating symbol references in
43 * code that was compiled without -fPIC. By default, the small memory
44 * model is used, which assumes that symbol references can fit in a
45 * 32-bit slot. The system dynamic linker makes this work for
46 * references to shared libraries by either (a) allocating a jump
47 * table slot for code references, or (b) moving the symbol at load
48 * time (and copying its contents, if necessary) for data references.
49 *
50 * We unfortunately can't tell whether symbol references are to code
51 * or data. So for now we assume they are code (the vast majority
52 * are), and allocate jump-table slots. Unfortunately this will
53 * SILENTLY generate crashing code for data references. This hack is
54 * enabled by X86_64_ELF_NONPIC_HACK.
55 *
56 * One workaround is to use shared Haskell libraries. This is
57 * coming. Another workaround is to keep the static libraries but
58 * compile them with -fPIC, because that will generate PIC references
59 * to data which can be relocated. The PIC code is still too green to
60 * do this systematically, though.
61 *
62 * See bug #781
63 * See thread http://www.haskell.org/pipermail/cvs-ghc/2007-September/038458.html
64 *
65 * Naming Scheme for Symbol Macros
66 *
67 * SymI_*: symbol is internal to the RTS. It resides in an object
68 * file/library that is statically.
69 * SymE_*: symbol is external to the RTS library. It might be linked
70 * dynamically.
71 *
72 * Sym*_HasProto : the symbol prototype is imported in an include file
73 * or defined explicitly
74 * Sym*_NeedsProto: the symbol is undefined and we add a dummy
75 * default proto extern void sym(void);
76 */
77 #define X86_64_ELF_NONPIC_HACK 1
78
79 #if defined(sparc_HOST_ARCH)
80 # define ELF_TARGET_SPARC /* Used inside <elf.h> */
81 #elif defined(i386_HOST_ARCH)
82 # define ELF_TARGET_386 /* Used inside <elf.h> */
83 #elif defined(x86_64_HOST_ARCH)
84 # define ELF_TARGET_X64_64
85 # define ELF_TARGET_AMD64 /* Used inside <elf.h> on Solaris 11 */
86 #endif
87
88 #if !defined(openbsd_HOST_OS)
89 # include <elf.h>
90 #else
91 /* openbsd elf has things in different places, with diff names */
92 # include <elf_abi.h>
93 #endif
94
95 #if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
96 # define NEED_GOT
97 # define NEED_PLT
98 # include "elf_got.h"
99 # include "elf_plt.h"
100 # include "elf_reloc.h"
101 #endif
102
103 /*
104
105 Note [Many ELF Sections]
106
107 The normal section number fields in ELF are limited to 16 bits, which runs
108 out of bits when you try to cram in more sections than that.
109
110 To solve this, the fields e_shnum and e_shstrndx in the ELF header have an
111 escape value (different for each case), and the actual section number is
112 stashed into unused fields in the first section header.
113
114 For symbols, there seems to have been no place in the actual symbol table
115 for the extra bits, so the indexes have been moved into an auxiliary
116 section instead.
117 For symbols in sections beyond 0xff00, the symbol's st_shndx will be an
118 escape value (SHN_XINDEX), and the actual 32-bit section number for symbol N
119 is stored at index N in the SHT_SYMTAB_SHNDX table.
120
121 These extensions seem to be undocumented in version 4.1 of the ABI and only
122 appear in the drafts for the "next" version:
123 https://refspecs.linuxfoundation.org/elf/gabi4+/contents.html
124
125 */
126
127 static Elf_Word elf_shnum(Elf_Ehdr* ehdr)
128 {
129 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
130 Elf_Half shnum = ehdr->e_shnum;
131 return shnum != SHN_UNDEF ? shnum : shdr[0].sh_size;
132 }
133
134 static Elf_Word elf_shstrndx(Elf_Ehdr* ehdr)
135 {
136 Elf_Half shstrndx = ehdr->e_shstrndx;
137 #if defined(SHN_XINDEX)
138 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
139 return shstrndx != SHN_XINDEX ? shstrndx : shdr[0].sh_link;
140 #else
141 // some OSes do not support SHN_XINDEX yet, let's revert to
142 // old way
143 return shstrndx;
144 #endif
145 }
146
147 #if defined(SHN_XINDEX)
148 static Elf_Word*
149 get_shndx_table(Elf_Ehdr* ehdr)
150 {
151 Elf_Word i;
152 char* ehdrC = (char*)ehdr;
153 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
154 const Elf_Word shnum = elf_shnum(ehdr);
155
156 for (i = 0; i < shnum; i++) {
157 if (shdr[i].sh_type == SHT_SYMTAB_SHNDX) {
158 return (Elf32_Word*)(ehdrC + shdr[i].sh_offset);
159 }
160 }
161 return NULL;
162 }
163 #endif
164
165 /*
166 * ocInit and ocDeinit
167 */
168
169 void
170 ocInit_ELF(ObjectCode * oc)
171 {
172 oc->info = (struct ObjectCodeFormatInfo*)stgCallocBytes(
173 1, sizeof *oc->info,
174 "ocInit_Elf(ObjectCodeFormatInfo)");
175 // TODO: fill info
176 oc->info->elfHeader = (Elf_Ehdr *)oc->image;
177 oc->info->programHeader = (Elf_Phdr *) ((uint8_t*)oc->image
178 + oc->info->elfHeader->e_phoff);
179 oc->info->sectionHeader = (Elf_Shdr *) ((uint8_t*)oc->image
180 + oc->info->elfHeader->e_shoff);
181 oc->info->sectionHeaderStrtab = (char*)((uint8_t*)oc->image +
182 oc->info->sectionHeader[oc->info->elfHeader->e_shstrndx].sh_offset);
183
184 oc->n_sections = elf_shnum(oc->info->elfHeader);
185
186 /* get the symbol table(s) */
187 for(int i=0; i < oc->n_sections; i++) {
188 if(SHT_REL == oc->info->sectionHeader[i].sh_type) {
189 ElfRelocationTable *relTab = (ElfRelocationTable *)stgCallocBytes(
190 1, sizeof(ElfRelocationTable),
191 "ocInit_Elf(ElfRelocationTable");
192 relTab->index = i;
193
194 relTab->relocations =
195 (Elf_Rel*) ((uint8_t*)oc->info->elfHeader
196 + oc->info->sectionHeader[i].sh_offset);
197 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
198 / sizeof(Elf_Rel);
199 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
200
201 relTab->sectionHeader = &oc->info->sectionHeader[i];
202
203 if(oc->info->relTable == NULL) {
204 oc->info->relTable = relTab;
205 } else {
206 ElfRelocationTable * tail = oc->info->relTable;
207 while(tail->next != NULL) tail = tail->next;
208 tail->next = relTab;
209 }
210
211 } else if(SHT_RELA == oc->info->sectionHeader[i].sh_type) {
212 ElfRelocationATable *relTab = (ElfRelocationATable *)stgCallocBytes(
213 1, sizeof(ElfRelocationATable),
214 "ocInit_Elf(ElfRelocationTable");
215 relTab->index = i;
216
217 relTab->relocations =
218 (Elf_Rela*) ((uint8_t*)oc->info->elfHeader
219 + oc->info->sectionHeader[i].sh_offset);
220 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
221 / sizeof(Elf_Rela);
222 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
223
224 relTab->sectionHeader = &oc->info->sectionHeader[i];
225
226 if(oc->info->relaTable == NULL) {
227 oc->info->relaTable = relTab;
228 } else {
229 ElfRelocationATable * tail = oc->info->relaTable;
230 while(tail->next != NULL) tail = tail->next;
231 tail->next = relTab;
232 }
233
234 } else if(SHT_SYMTAB == oc->info->sectionHeader[i].sh_type) {
235
236 ElfSymbolTable *symTab = (ElfSymbolTable *)stgCallocBytes(
237 1, sizeof(ElfSymbolTable),
238 "ocInit_Elf(ElfSymbolTable");
239
240 symTab->index = i; /* store the original index, so we can later
241 * find or assert that we are dealing with the
242 * correct symbol table */
243
244 Elf_Sym *stab = (Elf_Sym*)((uint8_t*)oc->info->elfHeader
245 + oc->info->sectionHeader[i].sh_offset);
246 symTab->n_symbols = oc->info->sectionHeader[i].sh_size
247 / sizeof(Elf_Sym);
248 symTab->symbols = (ElfSymbol *)stgCallocBytes(
249 symTab->n_symbols, sizeof(ElfSymbol),
250 "ocInit_Elf(ElfSymbol)");
251
252 /* get the strings table */
253 size_t lnkIdx = oc->info->sectionHeader[i].sh_link;
254 symTab->names = (char*)(uint8_t*)oc->info->elfHeader
255 + oc->info->sectionHeader[lnkIdx].sh_offset;
256
257 /* build the ElfSymbols from the symbols */
258 for(size_t j=0; j < symTab->n_symbols; j++) {
259
260 symTab->symbols[j].name = stab[j].st_name == 0
261 ? "(noname)"
262 : symTab->names + stab[j].st_name;
263 symTab->symbols[j].elf_sym = &stab[j];
264 /* we don't have an address for this symbol yet; this will be
265 * populated during ocGetNames. hence addr = NULL.
266 */
267 symTab->symbols[j].addr = NULL;
268 symTab->symbols[j].got_addr = NULL;
269 }
270
271 /* append the ElfSymbolTable */
272 if(oc->info->symbolTables == NULL) {
273 oc->info->symbolTables = symTab;
274 } else {
275 ElfSymbolTable * tail = oc->info->symbolTables;
276 while(tail->next != NULL) tail = tail->next;
277 tail->next = symTab;
278 }
279 }
280 }
281 }
282
283 void
284 ocDeinit_ELF(ObjectCode * oc)
285 {
286 /* free all ElfSymbolTables, and their associated
287 * ElfSymbols
288 */
289 if(oc->info != NULL) {
290 #if defined(NEED_GOT)
291 freeGot(oc);
292 #endif
293 ElfSymbolTable * last = oc->info->symbolTables;
294
295 while(last != NULL) {
296 ElfSymbolTable * t = last;
297 last = last->next;
298 stgFree(t->symbols);
299 stgFree(t);
300 }
301
302 {
303 ElfRelocationTable *last = oc->info->relTable;
304 while (last != NULL) {
305 ElfRelocationTable *t = last;
306 last = last->next;
307 stgFree(t);
308 }
309 }
310
311 {
312 ElfRelocationATable *last = oc->info->relaTable;
313 while (last != NULL) {
314 ElfRelocationATable *t = last;
315 last = last->next;
316 stgFree(t);
317 }
318 }
319
320 stgFree(oc->info);
321 }
322 }
323
324 /*
325 * Generic ELF functions
326 */
327
328 int
329 ocVerifyImage_ELF ( ObjectCode* oc )
330 {
331 Elf_Shdr* shdr;
332 Elf_Sym* stab;
333 int j, nent, nstrtab, nsymtabs;
334 Elf_Word i, shnum, shstrndx;
335 char* sh_strtab;
336
337 char* ehdrC = (char*)(oc->image);
338 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
339
340 if (ehdr->e_ident[EI_MAG0] != ELFMAG0 ||
341 ehdr->e_ident[EI_MAG1] != ELFMAG1 ||
342 ehdr->e_ident[EI_MAG2] != ELFMAG2 ||
343 ehdr->e_ident[EI_MAG3] != ELFMAG3) {
344 errorBelch("%s: not an ELF object", oc->fileName);
345 return 0;
346 }
347
348 if (ehdr->e_ident[EI_CLASS] != ELFCLASS) {
349 errorBelch("%s: unsupported ELF format", oc->fileName);
350 return 0;
351 }
352
353 if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) {
354 IF_DEBUG(linker,debugBelch( "Is little-endian\n" ));
355 } else
356 if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) {
357 IF_DEBUG(linker,debugBelch( "Is big-endian\n" ));
358 } else {
359 errorBelch("%s: unknown endianness", oc->fileName);
360 return 0;
361 }
362
363 if (ehdr->e_type != ET_REL) {
364 errorBelch("%s: not a relocatable object (.o) file", oc->fileName);
365 return 0;
366 }
367 IF_DEBUG(linker, debugBelch( "Is a relocatable object (.o) file\n" ));
368
369 IF_DEBUG(linker,debugBelch( "Architecture is " ));
370 switch (ehdr->e_machine) {
371 #if defined(EM_ARM)
372 case EM_ARM: IF_DEBUG(linker,debugBelch( "arm" )); break;
373 #endif
374 case EM_386: IF_DEBUG(linker,debugBelch( "x86" )); break;
375 #if defined(EM_SPARC32PLUS)
376 case EM_SPARC32PLUS:
377 #endif
378 case EM_SPARC: IF_DEBUG(linker,debugBelch( "sparc" )); break;
379 #if defined(EM_IA_64)
380 case EM_IA_64: IF_DEBUG(linker,debugBelch( "ia64" )); break;
381 #endif
382 case EM_PPC: IF_DEBUG(linker,debugBelch( "powerpc32" )); break;
383 #if defined(EM_PPC64)
384 case EM_PPC64: IF_DEBUG(linker,debugBelch( "powerpc64" ));
385 errorBelch("%s: RTS linker not implemented on PowerPC 64-bit",
386 oc->fileName);
387 return 0;
388 #endif
389 #if defined(EM_X86_64)
390 case EM_X86_64: IF_DEBUG(linker,debugBelch( "x86_64" )); break;
391 #elif defined(EM_AMD64)
392 case EM_AMD64: IF_DEBUG(linker,debugBelch( "amd64" )); break;
393 #endif
394 #if defined(EM_AARCH64)
395 case EM_AARCH64: IF_DEBUG(linker,debugBelch( "aarch64" )); break;
396 #endif
397 default: IF_DEBUG(linker,debugBelch( "unknown" ));
398 errorBelch("%s: unknown architecture (e_machine == %d)"
399 , oc->fileName, ehdr->e_machine);
400 return 0;
401 }
402
403 shnum = elf_shnum(ehdr);
404 IF_DEBUG(linker,debugBelch(
405 "\nSection header table: start %ld, n_entries %d, ent_size %d\n",
406 (long)ehdr->e_shoff, shnum, ehdr->e_shentsize ));
407
408 ASSERT(ehdr->e_shentsize == sizeof(Elf_Shdr));
409
410 shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
411
412 shstrndx = elf_shstrndx(ehdr);
413 if (shstrndx == SHN_UNDEF) {
414 errorBelch("%s: no section header string table", oc->fileName);
415 return 0;
416 } else {
417 IF_DEBUG(linker,debugBelch( "Section header string table is section %d\n",
418 shstrndx));
419 sh_strtab = ehdrC + shdr[shstrndx].sh_offset;
420 }
421
422 for (i = 0; i < shnum; i++) {
423 IF_DEBUG(linker,debugBelch("%2d: ", i ));
424 IF_DEBUG(linker,debugBelch("type=%2d ", (int)shdr[i].sh_type ));
425 IF_DEBUG(linker,debugBelch("size=%4d ", (int)shdr[i].sh_size ));
426 IF_DEBUG(linker,debugBelch("offs=%4d ", (int)shdr[i].sh_offset ));
427 IF_DEBUG(linker,debugBelch(" (%p .. %p) ",
428 ehdrC + shdr[i].sh_offset,
429 ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1));
430
431 #define SECTION_INDEX_VALID(ndx) (ndx > SHN_UNDEF && ndx < shnum)
432
433 switch (shdr[i].sh_type) {
434
435 case SHT_REL:
436 case SHT_RELA:
437 IF_DEBUG(linker,debugBelch( shdr[i].sh_type == SHT_REL ? "Rel " : "RelA "));
438
439 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
440 if (shdr[i].sh_link == SHN_UNDEF)
441 errorBelch("\n%s: relocation section #%d has no symbol table\n"
442 "This object file has probably been fully stripped. "
443 "Such files cannot be linked.\n",
444 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
445 else
446 errorBelch("\n%s: relocation section #%d has an invalid link field (%d)\n",
447 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
448 i, shdr[i].sh_link);
449 return 0;
450 }
451 if (shdr[shdr[i].sh_link].sh_type != SHT_SYMTAB) {
452 errorBelch("\n%s: relocation section #%d does not link to a symbol table\n",
453 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
454 return 0;
455 }
456 if (!SECTION_INDEX_VALID(shdr[i].sh_info)) {
457 errorBelch("\n%s: relocation section #%d has an invalid info field (%d)\n",
458 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
459 i, shdr[i].sh_info);
460 return 0;
461 }
462
463 break;
464 case SHT_SYMTAB:
465 IF_DEBUG(linker,debugBelch("Sym "));
466
467 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
468 errorBelch("\n%s: symbol table section #%d has an invalid link field (%d)\n",
469 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
470 i, shdr[i].sh_link);
471 return 0;
472 }
473 if (shdr[shdr[i].sh_link].sh_type != SHT_STRTAB) {
474 errorBelch("\n%s: symbol table section #%d does not link to a string table\n",
475 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
476
477 return 0;
478 }
479 break;
480 case SHT_STRTAB: IF_DEBUG(linker,debugBelch("Str ")); break;
481 default: IF_DEBUG(linker,debugBelch(" ")); break;
482 }
483 if (sh_strtab) {
484 IF_DEBUG(linker,debugBelch("sname=%s\n", sh_strtab + shdr[i].sh_name ));
485 }
486 }
487
488 IF_DEBUG(linker,debugBelch( "\nString tables\n" ));
489 nstrtab = 0;
490 for (i = 0; i < shnum; i++) {
491 if (shdr[i].sh_type == SHT_STRTAB
492 /* Ignore the section header's string table. */
493 && i != shstrndx
494 /* Ignore string tables named .stabstr, as they contain
495 debugging info. */
496 && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
497 ) {
498 IF_DEBUG(linker,debugBelch(" section %d is a normal string table\n", i ));
499 nstrtab++;
500 }
501 }
502 if (nstrtab == 0) {
503 IF_DEBUG(linker,debugBelch(" no normal string tables (potentially, but not necessarily a problem)\n"));
504 }
505 #if defined(SHN_XINDEX)
506 Elf_Word* shndxTable = get_shndx_table(ehdr);
507 #endif
508 nsymtabs = 0;
509 IF_DEBUG(linker,debugBelch( "Symbol tables\n" ));
510 for (i = 0; i < shnum; i++) {
511 if (shdr[i].sh_type != SHT_SYMTAB) continue;
512 IF_DEBUG(linker,debugBelch( "section %d is a symbol table\n", i ));
513 nsymtabs++;
514 stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
515 nent = shdr[i].sh_size / sizeof(Elf_Sym);
516 IF_DEBUG(linker,debugBelch( " number of entries is apparently %d (%ld rem)\n",
517 nent,
518 (long)shdr[i].sh_size % sizeof(Elf_Sym)
519 ));
520 if (0 != shdr[i].sh_size % sizeof(Elf_Sym)) {
521 errorBelch("%s: non-integral number of symbol table entries", oc->fileName);
522 return 0;
523 }
524 for (j = 0; j < nent; j++) {
525 Elf_Word secno = stab[j].st_shndx;
526 #if defined(SHN_XINDEX)
527 /* See Note [Many ELF Sections] */
528 if (secno == SHN_XINDEX) {
529 ASSERT(shndxTable);
530 secno = shndxTable[j];
531 }
532 #endif
533 IF_DEBUG(linker,debugBelch(" %2d ", j ));
534 IF_DEBUG(linker,debugBelch(" sec=%-5d size=%-3d val=%5p ",
535 (int)secno,
536 (int)stab[j].st_size,
537 (char*)stab[j].st_value ));
538
539 IF_DEBUG(linker,debugBelch("type=" ));
540 switch (ELF_ST_TYPE(stab[j].st_info)) {
541 case STT_NOTYPE: IF_DEBUG(linker,debugBelch("notype " )); break;
542 case STT_OBJECT: IF_DEBUG(linker,debugBelch("object " )); break;
543 case STT_FUNC : IF_DEBUG(linker,debugBelch("func " )); break;
544 case STT_SECTION: IF_DEBUG(linker,debugBelch("section" )); break;
545 case STT_FILE: IF_DEBUG(linker,debugBelch("file " )); break;
546 default: IF_DEBUG(linker,debugBelch("? " )); break;
547 }
548 IF_DEBUG(linker,debugBelch(" " ));
549
550 IF_DEBUG(linker,debugBelch("bind=" ));
551 switch (ELF_ST_BIND(stab[j].st_info)) {
552 case STB_LOCAL : IF_DEBUG(linker,debugBelch("local " )); break;
553 case STB_GLOBAL: IF_DEBUG(linker,debugBelch("global" )); break;
554 case STB_WEAK : IF_DEBUG(linker,debugBelch("weak " )); break;
555 default: IF_DEBUG(linker,debugBelch("? " )); break;
556 }
557 IF_DEBUG(linker,debugBelch(" " ));
558
559 IF_DEBUG(linker,debugBelch("other=%2x ", stab[j].st_other ));
560 IF_DEBUG(linker,debugBelch("name=%s [%x]\n",
561 ehdrC + shdr[shdr[i].sh_link].sh_offset
562 + stab[j].st_name, stab[j].st_name ));
563 }
564 }
565
566 if (nsymtabs == 0) {
567 // Not having a symbol table is not in principle a problem.
568 // When an object file has no symbols then the 'strip' program
569 // typically will remove the symbol table entirely.
570 IF_DEBUG(linker,debugBelch(" no symbol tables (potentially, but not necessarily a problem)\n"));
571 }
572
573 return 1;
574 }
575
576 /* Figure out what kind of section it is. Logic derived from
577 Figure 1.14 ("Special Sections") of the ELF document
578 ("Portable Formats Specification, Version 1.1"). */
579 static int getSectionKind_ELF( Elf_Shdr *hdr, int *is_bss )
580 {
581 *is_bss = false;
582
583 if (hdr->sh_type == SHT_PROGBITS
584 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_EXECINSTR)) {
585 /* .text-style section */
586 return SECTIONKIND_CODE_OR_RODATA;
587 }
588
589 if (hdr->sh_type == SHT_PROGBITS
590 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
591 /* .data-style section */
592 return SECTIONKIND_RWDATA;
593 }
594
595 if (hdr->sh_type == SHT_PROGBITS
596 && (hdr->sh_flags & SHF_ALLOC) && !(hdr->sh_flags & SHF_WRITE)) {
597 /* .rodata-style section */
598 return SECTIONKIND_CODE_OR_RODATA;
599 }
600 #if defined(SHT_INIT_ARRAY)
601 if (hdr->sh_type == SHT_INIT_ARRAY
602 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
603 /* .init_array section */
604 return SECTIONKIND_INIT_ARRAY;
605 }
606 #endif /* not SHT_INIT_ARRAY */
607 if (hdr->sh_type == SHT_NOBITS
608 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
609 /* .bss-style section */
610 *is_bss = true;
611 return SECTIONKIND_RWDATA;
612 }
613
614 return SECTIONKIND_OTHER;
615 }
616
617 #if !defined(NEED_PLT)
618
619 static void *
620 mapObjectFileSection (int fd, Elf_Word offset, Elf_Word size,
621 void **mapped_start, StgWord *mapped_size,
622 StgWord *mapped_offset)
623 {
624 void *p;
625 size_t pageOffset, pageSize;
626
627 pageOffset = roundDownToPage(offset);
628 pageSize = roundUpToPage(offset-pageOffset+size);
629 p = mmapForLinker(pageSize, 0, fd, pageOffset);
630 if (p == NULL) return NULL;
631 *mapped_size = pageSize;
632 *mapped_offset = pageOffset;
633 *mapped_start = p;
634 return (void*)((StgWord)p + offset - pageOffset);
635 }
636 #endif
637
638 int
639 ocGetNames_ELF ( ObjectCode* oc )
640 {
641 Elf_Word i;
642 int result, fd = -1;
643
644 char* ehdrC = (char*)(oc->image);
645 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
646
647 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
648 Section * sections;
649 #if defined(SHN_XINDEX)
650 Elf_Word* shndxTable = get_shndx_table(ehdr);
651 #endif
652 const Elf_Word shnum = elf_shnum(ehdr);
653
654 ASSERT(symhash != NULL);
655
656 sections = (Section*)stgCallocBytes(sizeof(Section), shnum,
657 "ocGetNames_ELF(sections)");
658 oc->sections = sections;
659 oc->n_sections = shnum;
660
661 if (oc->imageMapped) {
662 #if defined(openbsd_HOST_OS)
663 fd = open(oc->fileName, O_RDONLY, S_IRUSR);
664 #else
665 fd = open(oc->fileName, O_RDONLY);
666 #endif
667 if (fd == -1) {
668 errorBelch("loadObj: can't open %" PATH_FMT, oc->fileName);
669 return 0;
670 }
671 }
672
673 for (i = 0; i < shnum; i++) {
674 int is_bss = false;
675 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
676 SectionAlloc alloc = SECTION_NOMEM;
677 void *start = NULL, *mapped_start = NULL;
678 StgWord mapped_size = 0, mapped_offset = 0;
679 StgWord size = shdr[i].sh_size;
680 StgWord offset = shdr[i].sh_offset;
681
682 if (is_bss && size > 0) {
683 /* This is a non-empty .bss section. Allocate zeroed space for
684 it, and set its .sh_offset field such that
685 ehdrC + .sh_offset == addr_of_zeroed_space. */
686 #if defined(NEED_GOT)
687 /* always use mmap if we use GOT slots. Otherwise the malloced
688 * address might be out of range for sections that are mmaped.
689 */
690 alloc = SECTION_MMAP;
691 start = mmap(NULL, size,
692 PROT_READ | PROT_WRITE | PROT_EXEC,
693 MAP_ANON | MAP_PRIVATE,
694 -1, 0);
695 mapped_start = start;
696 mapped_offset = 0;
697 mapped_size = roundUpToPage(size);
698 #else
699 alloc = SECTION_MALLOC;
700 start = stgCallocBytes(1, size, "ocGetNames_ELF(BSS)");
701 mapped_start = start;
702 #endif
703 /*
704 debugBelch("BSS section at 0x%x, size %d\n",
705 zspace, shdr[i].sh_size);
706 */
707 addSection(&sections[i], kind, alloc, start, size,
708 mapped_offset, mapped_start, mapped_size);
709
710 oc->sections[i].info->nstubs = 0;
711 oc->sections[i].info->stub_offset = NULL;
712 oc->sections[i].info->stub_size = 0;
713 oc->sections[i].info->stubs = NULL;
714 } else if (kind != SECTIONKIND_OTHER && size > 0) {
715
716 #if defined(NEED_PLT)
717 /* To support stubs next to sections, we will use the following
718 * layout:
719 *
720 * .--------------.
721 * | Section data |
722 * |--------------|
723 * | Stub space |
724 * '--------------'
725 *
726 * This ensures that the plt stubs are in range for the section data,
727 * Unless the section data exceeds the size for relative jump, in
728 * which case I wouldn't know how to solve this, without starting to
729 * break up the section itself.
730 */
731
732 unsigned nstubs = numberOfStubsForSection(oc, i);
733 unsigned stub_space = STUB_SIZE * nstubs;
734
735 void * mem = mmap(NULL, size+stub_space,
736 PROT_READ | PROT_WRITE | PROT_EXEC,
737 MAP_ANON | MAP_PRIVATE,
738 -1, 0);
739
740 if( mem == MAP_FAILED ) {
741 barf("failed to mmap allocated memory to load section %d. "
742 "errno = %d", i, errno);
743 }
744
745 /* copy only the image part over; we don't want to copy data
746 * into the stub part.
747 */
748 memcpy( mem, oc->image + offset, size );
749
750 alloc = SECTION_MMAP;
751
752 mapped_offset = 0;
753 mapped_size = roundUpToPage(size+stub_space);
754 start = mem;
755 mapped_start = mem;
756 #else
757 if (USE_CONTIGUOUS_MMAP) {
758 // already mapped.
759 start = oc->image + offset;
760 alloc = SECTION_NOMEM;
761 }
762 // use the m32 allocator if either the image is not mapped
763 // (i.e. we cannot map the secions separately), or if the section
764 // size is small.
765 else if (!oc->imageMapped || size < getPageSize() / 3) {
766 start = m32_alloc(size, 8);
767 if (start == NULL) goto fail;
768 memcpy(start, oc->image + offset, size);
769 alloc = SECTION_M32;
770 } else {
771 start = mapObjectFileSection(fd, offset, size,
772 &mapped_start, &mapped_size,
773 &mapped_offset);
774 if (start == NULL) goto fail;
775 alloc = SECTION_MMAP;
776 }
777 #endif
778 addSection(&sections[i], kind, alloc, start, size,
779 mapped_offset, mapped_start, mapped_size);
780
781 #if defined(NEED_PLT)
782 oc->sections[i].info->nstubs = 0;
783 oc->sections[i].info->stub_offset = (uint8_t*)mem + size;
784 oc->sections[i].info->stub_size = stub_space;
785 oc->sections[i].info->stubs = NULL;
786 #else
787 oc->sections[i].info->nstubs = 0;
788 oc->sections[i].info->stub_offset = NULL;
789 oc->sections[i].info->stub_size = 0;
790 oc->sections[i].info->stubs = NULL;
791 #endif
792
793 addProddableBlock(oc, start, size);
794 } else {
795 addSection(&oc->sections[i], kind, alloc, oc->image+offset, size,
796 0, 0, 0);
797 oc->sections[i].info->nstubs = 0;
798 oc->sections[i].info->stub_offset = NULL;
799 oc->sections[i].info->stub_size = 0;
800 oc->sections[i].info->stubs = NULL;
801 }
802 oc->sections[i].info->name = oc->info->sectionHeaderStrtab
803 + shdr[i].sh_name;
804 oc->sections[i].info->sectionHeader = &shdr[i];
805
806
807
808
809 if (shdr[i].sh_type != SHT_SYMTAB) continue;
810
811 /* copy stuff into this module's object symbol table */
812
813 oc->n_symbols = 0;
814 for(ElfSymbolTable *symTab = oc->info->symbolTables;
815 symTab != NULL; symTab = symTab->next) {
816 oc->n_symbols += symTab->n_symbols;
817 }
818
819 oc->symbols = stgCallocBytes(oc->n_symbols, sizeof(Symbol_t),
820 "ocGetNames_ELF(oc->symbols)");
821 // Note calloc: if we fail partway through initializing symbols, we need
822 // to undo the additions to the symbol table so far. We know which ones
823 // have been added by whether the entry is NULL or not.
824
825 unsigned curSymbol = 0;
826
827 //TODO: we ignore local symbols anyway right? So we can use the
828 // shdr[i].sh_info to get the index of the first non-local symbol
829 // ie we should use j = shdr[i].sh_info
830 for(ElfSymbolTable *symTab = oc->info->symbolTables;
831 symTab != NULL; symTab = symTab->next) {
832 for (size_t j = 0; j < symTab->n_symbols; j++) {
833
834 char isLocal = false; /* avoids uninit-var warning */
835 HsBool isWeak = HS_BOOL_FALSE;
836 SymbolName *nm = symTab->symbols[j].name;
837 unsigned short shndx = symTab->symbols[j].elf_sym->st_shndx;
838
839 ElfSymbol *symbol = &symTab->symbols[j];
840
841 Elf_Word secno;
842
843
844 /* See Note [Many ELF Sections] */
845 /* Note that future checks for special SHN_* numbers should check
846 * the shndx variable, not the section number in secno. Sections
847 * with the real number in the SHN_LORESERVE..HIRESERVE range
848 * will have shndx SHN_XINDEX and a secno with one of the
849 * reserved values. */
850 secno = shndx;
851 #if defined(SHN_XINDEX)
852 if (shndx == SHN_XINDEX) {
853 ASSERT(shndxTable);
854 secno = shndxTable[j];
855 }
856 #endif
857 /* Figure out if we want to add it; if so, set ad to its
858 address. Otherwise leave ad == NULL. */
859
860 if (shndx == SHN_COMMON) {
861 isLocal = false;
862 symbol->addr = stgCallocBytes(1, symbol->elf_sym->st_size,
863 "ocGetNames_ELF(COMMON)");
864 /*
865 debugBelch("COMMON symbol, size %d name %s\n",
866 stab[j].st_size, nm);
867 */
868 /* Pointless to do addProddableBlock() for this area,
869 since the linker should never poke around in it. */
870 } else if ((ELF_ST_BIND(symbol->elf_sym->st_info) == STB_GLOBAL
871 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL
872 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_WEAK
873 )
874 /* and not an undefined symbol */
875 && shndx != SHN_UNDEF
876 /* and not in a "special section" */
877 && (shndx < SHN_LORESERVE
878 #if defined(SHN_XINDEX)
879 || shndx == SHN_XINDEX
880 #endif
881 )
882 &&
883 /* and it's a not a section or string table or
884 * anything silly */
885 (ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC
886 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_OBJECT
887 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_NOTYPE
888 )
889 ) {
890 /* Section 0 is the undefined section, hence > and not >=. */
891 ASSERT(secno > 0 && secno < shnum);
892 /*
893 if (shdr[secno].sh_type == SHT_NOBITS) {
894 debugBelch(" BSS symbol, size %d off %d name %s\n",
895 stab[j].st_size, stab[j].st_value, nm);
896 }
897 */
898 symbol->addr = (SymbolAddr*)(
899 (intptr_t) oc->sections[secno].start +
900 (intptr_t) symbol->elf_sym->st_value);
901
902 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
903 isLocal = true;
904 isWeak = false;
905 } else { /* STB_GLOBAL or STB_WEAK */
906 IF_DEBUG(linker,
907 debugBelch("addOTabName(GLOB): %10p %s %s\n",
908 symbol->addr, oc->fileName, nm));
909 isLocal = false;
910 isWeak = ELF_ST_BIND(symbol->elf_sym->st_info)
911 == STB_WEAK;
912 }
913 }
914
915 /* And the decision is ... */
916
917 if (symbol->addr != NULL) {
918 ASSERT(nm != NULL);
919 /* Acquire! */
920 if (!isLocal) {
921
922 if (isWeak == HS_BOOL_TRUE) {
923 setWeakSymbol(oc, nm);
924 }
925 if (!ghciInsertSymbolTable(oc->fileName, symhash,
926 nm, symbol->addr, isWeak, oc)
927 ) {
928 goto fail;
929 }
930 oc->symbols[curSymbol++].name = nm;
931 oc->symbols[curSymbol].addr = symbol->addr;
932 }
933 } else {
934 /* Skip. */
935 IF_DEBUG(linker,
936 debugBelch("skipping `%s'\n",
937 nm)
938 );
939
940 /*
941 debugBelch(
942 "skipping bind = %d, type = %d, secno = %d `%s'\n",
943 (int)ELF_ST_BIND(stab[j].st_info),
944 (int)ELF_ST_TYPE(stab[j].st_info),
945 (int)secno,
946 nm
947 );
948 */
949 }
950 }
951 }
952 }
953
954 #if defined(NEED_GOT)
955 if(makeGot( oc ))
956 errorBelch("Failed to create GOT for %s",
957 oc->archiveMemberName
958 ? oc->archiveMemberName
959 : oc->fileName);
960 #endif
961 result = 1;
962 goto end;
963
964 fail:
965 result = 0;
966 goto end;
967
968 end:
969 if (fd >= 0) close(fd);
970 return result;
971 }
972
973 // the aarch64 linker uses relocacteObjectCodeAarch64,
974 // see elf_reloc_aarch64.{h,c}
975 #if !defined(aarch64_HOST_ARCH)
976
977 /* Do ELF relocations which lack an explicit addend. All x86-linux
978 and arm-linux relocations appear to be of this form. */
979 static int
980 do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
981 Elf_Shdr* shdr, int shnum )
982 {
983 int j;
984
985 Elf_Word* targ;
986 Elf_Rel* rtab = (Elf_Rel*) (ehdrC + shdr[shnum].sh_offset);
987
988 int nent = shdr[shnum].sh_size / sizeof(Elf_Rel);
989 int target_shndx = shdr[shnum].sh_info;
990 int symtab_shndx = shdr[shnum].sh_link;
991
992 ElfSymbolTable *stab = NULL;
993 for(ElfSymbolTable * st = oc->info->symbolTables;
994 st != NULL; st = st->next) {
995 if((int)st->index == symtab_shndx) {
996 stab = st;
997 break;
998 }
999 }
1000 ASSERT(stab != NULL);
1001
1002 targ = (Elf_Word*)oc->sections[target_shndx].start;
1003 IF_DEBUG(linker,debugBelch(
1004 "relocations for section %d using symtab %d\n",
1005 target_shndx, symtab_shndx));
1006
1007 /* Skip sections that we're not interested in. */
1008 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1009 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1010 return 1;
1011 }
1012
1013 for (j = 0; j < nent; j++) {
1014 Elf_Addr offset = rtab[j].r_offset;
1015 Elf_Addr info = rtab[j].r_info;
1016
1017 Elf_Addr P = ((Elf_Addr)targ) + offset;
1018 Elf_Word* pP = (Elf_Word*)P;
1019 #if defined(i386_HOST_ARCH) || defined(DEBUG)
1020 Elf_Addr A = *pP;
1021 #endif
1022 Elf_Addr S;
1023 void* S_tmp;
1024 #if defined(i386_HOST_ARCH)
1025 Elf_Addr value;
1026 #endif
1027 #if defined(arm_HOST_ARCH)
1028 int is_target_thm=0, T=0;
1029 #endif
1030
1031 ElfSymbol * symbol = NULL;
1032
1033 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p): ",
1034 j, (void*)offset, (void*)info ));
1035 if (!info) {
1036 IF_DEBUG(linker,debugBelch( " ZERO" ));
1037 S = 0;
1038 } else {
1039 symbol = &stab->symbols[ELF_R_SYM(info)];
1040 /* First see if it is a local symbol. */
1041 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
1042 S = (Elf_Addr)symbol->addr;
1043 } else {
1044 S_tmp = lookupSymbol_( symbol->name );
1045 S = (Elf_Addr)S_tmp;
1046 }
1047 if (!S) {
1048 errorBelch("%s: unknown symbol `%s'",
1049 oc->fileName, symbol->name);
1050 return 0;
1051 }
1052 IF_DEBUG(linker,debugBelch( "`%s' resolves to %p\n", symbol->name,
1053 (void*)S ));
1054
1055 #if defined(arm_HOST_ARCH)
1056 /*
1057 * 4.5.3 Symbol Values
1058 *
1059 * In addition to the normal rules for symbol values the following
1060 * rules shall also apply to symbols of type STT_FUNC:
1061 * - If the symbol addresses an ARM instruction, its value is the
1062 * address of the instruction (in a relocatable object, the
1063 * offset of the instruction from the start of the section
1064 * containing it).
1065 * - If the symbol addresses a Thumb instruction, its value is the
1066 * address of the instruction with bit zero set (in a relocatable
1067 * object, the section offset with bit zero set).
1068 * - For the purposes of relocation the value used shall be the
1069 * address of the instruction (st_value & ~1).
1070 *
1071 * Note: This allows a linker to distinguish ARM and Thumb code
1072 * symbols without having to refer to the map. An ARM symbol
1073 * will always have an even value, while a Thumb symbol will
1074 * always have an odd value. However, a linker should strip
1075 * the discriminating bit from the value before using it for
1076 * relocation.
1077 *
1078 * (source: ELF for the ARM Architecture
1079 * ARM IHI 0044F, current through ABI release 2.10
1080 * 24th November 2015)
1081 */
1082 if(ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC) {
1083 is_target_thm = S & 0x1;
1084 T = is_target_thm;
1085 S &= ~1;
1086 }
1087 #endif
1088 }
1089
1090 int reloc_type = ELF_R_TYPE(info);
1091 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p type=%d\n",
1092 (void*)P, (void*)S, (void*)A, reloc_type ));
1093 checkProddableBlock ( oc, pP, sizeof(Elf_Word) );
1094
1095 #if defined(i386_HOST_ARCH)
1096 value = S + A;
1097 #endif
1098
1099 switch (reloc_type) {
1100 # ifdef i386_HOST_ARCH
1101 case COMPAT_R_386_NONE: break;
1102 case COMPAT_R_386_32: *pP = value; break;
1103 case COMPAT_R_386_PC32: *pP = value - P; break;
1104 # endif
1105
1106 # ifdef arm_HOST_ARCH
1107 case COMPAT_R_ARM_ABS32:
1108 // Specified by Linux ARM ABI to be equivalent to ABS32
1109 case COMPAT_R_ARM_TARGET1:
1110 *(Elf32_Word *)P += S;
1111 *(Elf32_Word *)P |= T;
1112 break;
1113
1114 case COMPAT_R_ARM_REL32:
1115 *(Elf32_Word *)P += S;
1116 *(Elf32_Word *)P |= T;
1117 *(Elf32_Word *)P -= P;
1118 break;
1119
1120 case COMPAT_R_ARM_CALL:
1121 case COMPAT_R_ARM_JUMP24:
1122 {
1123 // N.B. LLVM's LLD linker's relocation implementation is a fantastic
1124 // resource
1125 StgWord32 *word = (StgWord32 *)P;
1126 StgInt32 imm = (*word & ((1<<24)-1)) << 2;
1127
1128 const StgBool is_blx = (*word & 0xf0000000) == 0xf0000000;
1129 const StgWord32 hBit = is_blx ? ((*word >> 24) & 1) : 0;
1130 imm |= hBit << 1;
1131
1132 // Sign extend to 32 bits
1133 // I would have thought this would be 24 bits but LLD uses 26 here.
1134 // Hmm.
1135 int32_t A = signExtend32(26, imm);
1136
1137 S = S + A; A = 0;
1138
1139 StgWord32 result = ((S + A) | T) - P;
1140
1141 const StgBool overflow = !isInt(26, (StgInt32) result);
1142 // Handle overflow and Thumb interworking
1143 const StgBool needs_veneer =
1144 (is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_JUMP24)
1145 || overflow;
1146
1147 if(needs_veneer) { /* overflow or thum interworking */
1148 // Note [PC bias]
1149 // From the ELF for the ARM Architecture documentation:
1150 // > 4.6.1.1 Addends and PC-bias compensation
1151 // > A binary file may use REL or RELA relocations or a mixture
1152 // > of the two (but multiple relocations for the same address
1153 // > must use only one type).
1154 // > If the relocation is pc-relative then compensation for the
1155 // > PC bias (the PC value is 8 bytes ahead of the executing
1156 // > instruction in ARM state and 4 bytes in Thumb state) must
1157 // > be encoded in the relocation by the object producer.
1158 int32_t bias = 8;
1159
1160 S += bias;
1161 /* try to locate an existing stub for this target */
1162 if(findStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1163 /* didn't find any. Need to create one */
1164 if(makeStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1165 errorBelch("Unable to create veneer for ARM_CALL\n");
1166 return 0;
1167 }
1168 }
1169 S -= bias;
1170
1171 result = ((S + A) | T) - P;
1172 result &= ~1; // Clear thumb indicator bit
1173
1174 ASSERT(isInt(26, result)); /* X in range */
1175 }
1176
1177 // Update the branch target
1178 const StgWord32 imm24 = (result & 0x03fffffc) >> 2;
1179 *word = (*word & ~0x00ffffff)
1180 | (imm24 & 0x00ffffff);
1181
1182 // Change the relocated branch into a BLX if necessary
1183 const StgBool switch_mode =
1184 is_target_thm && (reloc_type == COMPAT_R_ARM_CALL);
1185 if (!needs_veneer && switch_mode) {
1186 const StgWord32 hBit = (result & 0x2) >> 1;
1187 // Change instruction to BLX
1188 *word = (*word & ~0xFF000000) | ((0xfa | hBit) << 24);
1189 IF_DEBUG(linker, debugBelch("Changed BL to BLX at %p\n", word));
1190 }
1191 break;
1192 }
1193
1194 case COMPAT_R_ARM_MOVT_ABS:
1195 case COMPAT_R_ARM_MOVW_ABS_NC:
1196 {
1197 StgWord32 *word = (StgWord32 *)P;
1198 StgWord32 imm12 = *word & 0xfff;
1199 StgWord32 imm4 = (*word >> 16) & 0xf;
1200 StgInt32 offset = imm4 << 12 | imm12;
1201 StgWord32 result = (S + offset) | T;
1202
1203 if (reloc_type == COMPAT_R_ARM_MOVT_ABS)
1204 result = (result & 0xffff0000) >> 16;
1205
1206 StgWord32 result12 = result & 0xfff;
1207 StgWord32 result4 = (result >> 12) & 0xf;
1208 *word = (*word & ~0xf0fff) | (result4 << 16) | result12;
1209 break;
1210 }
1211
1212 case COMPAT_R_ARM_THM_CALL:
1213 case COMPAT_R_ARM_THM_JUMP24:
1214 {
1215 StgWord16 *upper = (StgWord16 *)P;
1216 StgWord16 *lower = (StgWord16 *)(P + 2);
1217
1218 int overflow;
1219 int to_thm = (*lower >> 12) & 1;
1220 int sign = (*upper >> 10) & 1;
1221 int j1, j2, i1, i2;
1222
1223 // Decode immediate value
1224 j1 = (*lower >> 13) & 1; i1 = ~(j1 ^ sign) & 1;
1225 j2 = (*lower >> 11) & 1; i2 = ~(j2 ^ sign) & 1;
1226
1227 StgInt32 A = (sign << 24)
1228 | (i1 << 23)
1229 | (i2 << 22)
1230 | ((*upper & 0x03ff) << 12)
1231 | ((*lower & 0x07ff) << 1);
1232
1233 // Sign extend 25 to 32 bits
1234 if (A & 0x01000000)
1235 A -= 0x02000000;
1236
1237 S = S + A; A = 0;
1238
1239 offset = ((S + A) | T) - P;
1240 overflow = offset <= (StgWord32)0xff000000
1241 || offset >= (StgWord32)0x01000000;
1242
1243 if ((!is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_JUMP24)
1244 || overflow) {
1245 // Generate veneer
1246
1247 // see [PC bias] above.
1248 int32_t bias = 4;
1249 S += bias;
1250 // set the Thumb indicator to S, the final address should
1251 // carry the correct thumb indicator.
1252 S |= T;
1253 /* try to locate an existing stub for this target */
1254 if(findStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1255 /* didn't find any. Need to create one */
1256 if(makeStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1257 errorBelch("Unable to create veneer for ARM_THM_CALL\n");
1258 return 0;
1259 }
1260 }
1261 S -= bias;
1262
1263 offset = ((S + A) | T) - P;
1264
1265 sign = offset >> 31;
1266 to_thm = 1;
1267 } else if (!is_target_thm
1268 && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_CALL) {
1269 offset &= ~0x3;
1270 to_thm = 0;
1271 }
1272
1273 // Reencode instruction
1274 i1 = ~(offset >> 23) & 1; j1 = sign ^ i1;
1275 i2 = ~(offset >> 22) & 1; j2 = sign ^ i2;
1276 *upper = ( (*upper & 0xf800)
1277 | (sign << 10)
1278 | ((offset >> 12) & 0x03ff) );
1279 *lower = ( (*lower & 0xd000)
1280 | (j1 << 13)
1281 | (to_thm << 12)
1282 | (j2 << 11)
1283 | ((offset >> 1) & 0x07ff) );
1284 break;
1285 }
1286
1287 case COMPAT_R_ARM_THM_MOVT_ABS:
1288 case COMPAT_R_ARM_THM_MOVW_ABS_NC:
1289 {
1290 StgWord16 *upper = (StgWord16 *)P;
1291 StgWord16 *lower = (StgWord16 *)(P + 2);
1292 StgInt32 offset = ((*upper & 0x000f) << 12)
1293 | ((*upper & 0x0400) << 1)
1294 | ((*lower & 0x7000) >> 4)
1295 | (*lower & 0x00ff);
1296
1297 offset = (offset ^ 0x8000) - 0x8000; // Sign extend
1298 offset += S;
1299 if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVW_ABS_NC)
1300 offset |= T;
1301 else if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVT_ABS)
1302 offset >>= 16;
1303
1304 *upper = ( (*upper & 0xfbf0)
1305 | ((offset & 0xf000) >> 12)
1306 | ((offset & 0x0800) >> 1) );
1307 *lower = ( (*lower & 0x8f00)
1308 | ((offset & 0x0700) << 4)
1309 | (offset & 0x00ff) );
1310 break;
1311 }
1312
1313 case COMPAT_R_ARM_THM_JUMP8:
1314 {
1315 StgWord16 *word = (StgWord16 *)P;
1316 StgWord offset = *word & 0x01fe;
1317 offset += S - P;
1318 if (!is_target_thm) {
1319 errorBelch("%s: Thumb to ARM transition with JUMP8 relocation "
1320 "not supported\n",
1321 oc->fileName);
1322 return 0;
1323 }
1324
1325 *word = (*word & ~0x01fe)
1326 | (offset & 0x01fe);
1327 break;
1328 }
1329
1330 case COMPAT_R_ARM_THM_JUMP11:
1331 {
1332 StgWord16 *word = (StgWord16 *)P;
1333 StgWord offset = *word & 0x0ffe;
1334 offset += S - P;
1335 if (!is_target_thm) {
1336 errorBelch("%s: Thumb to ARM transition with JUMP11 relocation "
1337 "not supported\n",
1338 oc->fileName);
1339 return 0;
1340 }
1341
1342 *word = (*word & ~0x0ffe)
1343 | (offset & 0x0ffe);
1344 break;
1345 }
1346 case COMPAT_R_ARM_GOT_PREL: {
1347 int32_t A = *pP;
1348 void* GOT_S = symbol->got_addr;
1349 ASSERT(GOT_S);
1350 *(uint32_t *)P = (uint32_t) GOT_S + A - P;
1351 break;
1352 }
1353 # endif // arm_HOST_ARCH
1354
1355 default:
1356 errorBelch("%s: unhandled ELF relocation(Rel) type %" FMT_Word "\n",
1357 oc->fileName, (W_)ELF_R_TYPE(info));
1358 return 0;
1359 }
1360
1361 }
1362 return 1;
1363 }
1364
1365 /* Do ELF relocations for which explicit addends are supplied.
1366 sparc-solaris relocations appear to be of this form. */
1367 static int
1368 do_Elf_Rela_relocations ( ObjectCode* oc, char* ehdrC,
1369 Elf_Shdr* shdr, int shnum )
1370 {
1371 int j;
1372 SymbolName* symbol = NULL;
1373 Elf_Rela* rtab = (Elf_Rela*) (ehdrC + shdr[shnum].sh_offset);
1374 Elf_Sym* stab;
1375 char* strtab;
1376 int nent = shdr[shnum].sh_size / sizeof(Elf_Rela);
1377 int symtab_shndx = shdr[shnum].sh_link;
1378 int strtab_shndx = shdr[symtab_shndx].sh_link;
1379 int target_shndx = shdr[shnum].sh_info;
1380 #if defined(SHN_XINDEX)
1381 Elf_Word* shndx_table = get_shndx_table((Elf_Ehdr*)ehdrC);
1382 #endif
1383 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1384 || defined(x86_64_HOST_ARCH)
1385 /* This #if def only serves to avoid unused-var warnings. */
1386 Elf_Addr targ = (Elf_Addr) oc->sections[target_shndx].start;
1387 #endif
1388
1389 stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
1390 strtab= (char*) (ehdrC + shdr[ strtab_shndx ].sh_offset);
1391
1392 IF_DEBUG(linker,debugBelch( "relocations for section %d using symtab %d\n",
1393 target_shndx, symtab_shndx ));
1394
1395 /* Skip sections that we're not interested in. */
1396 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1397 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1398 return 1;
1399 }
1400
1401 for (j = 0; j < nent; j++) {
1402 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1403 || defined(x86_64_HOST_ARCH)
1404 /* This #if def only serves to avoid unused-var warnings. */
1405 Elf_Addr offset = rtab[j].r_offset;
1406 Elf_Addr P = targ + offset;
1407 Elf_Addr A = rtab[j].r_addend;
1408 #endif
1409 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1410 || defined(x86_64_HOST_ARCH)
1411 Elf_Addr value;
1412 #endif
1413 Elf_Addr info = rtab[j].r_info;
1414 Elf_Addr S;
1415 void* S_tmp;
1416 # if defined(sparc_HOST_ARCH)
1417 Elf_Word* pP = (Elf_Word*)P;
1418 Elf_Word w1, w2;
1419 # elif defined(powerpc_HOST_ARCH)
1420 Elf_Sword delta;
1421 # endif
1422
1423 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p %6p) ",
1424 j, (void*)offset, (void*)info,
1425 (void*)A ));
1426 if (!info) {
1427 IF_DEBUG(linker,debugBelch( " ZERO" ));
1428 S = 0;
1429 } else {
1430 Elf_Sym sym = stab[ELF_R_SYM(info)];
1431 /* First see if it is a local symbol. */
1432 if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
1433 /* Yes, so we can get the address directly from the ELF symbol
1434 table. */
1435 symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
1436 /* See Note [Many ELF Sections] */
1437 Elf_Word secno = sym.st_shndx;
1438 #if defined(SHN_XINDEX)
1439 if (secno == SHN_XINDEX) {
1440 secno = shndx_table[ELF_R_SYM(info)];
1441 }
1442 #endif
1443 S = (Elf_Addr)oc->sections[secno].start
1444 + stab[ELF_R_SYM(info)].st_value;
1445 } else {
1446 /* No, so look up the name in our global table. */
1447 symbol = strtab + sym.st_name;
1448 S_tmp = lookupSymbol_( symbol );
1449 S = (Elf_Addr)S_tmp;
1450 }
1451 if (!S) {
1452 errorBelch("%s: unknown symbol `%s'", oc->fileName, symbol);
1453 return 0;
1454 }
1455 IF_DEBUG(linker,debugBelch("`%s' resolves to %p\n", symbol, (void*)S));
1456 }
1457
1458 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1459 || defined(x86_64_HOST_ARCH)
1460 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p\n",
1461 (void*)P, (void*)S, (void*)A ));
1462 checkProddableBlock(oc, (void*)P, sizeof(Elf_Word));
1463 #endif
1464
1465 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1466 || defined(x86_64_HOST_ARCH)
1467 value = S + A;
1468 #endif
1469
1470 switch (ELF_R_TYPE(info)) {
1471 # if defined(sparc_HOST_ARCH)
1472 case R_SPARC_WDISP30:
1473 w1 = *pP & 0xC0000000;
1474 w2 = (Elf_Word)((value - P) >> 2);
1475 ASSERT((w2 & 0xC0000000) == 0);
1476 w1 |= w2;
1477 *pP = w1;
1478 break;
1479 case R_SPARC_HI22:
1480 w1 = *pP & 0xFFC00000;
1481 w2 = (Elf_Word)(value >> 10);
1482 ASSERT((w2 & 0xFFC00000) == 0);
1483 w1 |= w2;
1484 *pP = w1;
1485 break;
1486 case R_SPARC_LO10:
1487 w1 = *pP & ~0x3FF;
1488 w2 = (Elf_Word)(value & 0x3FF);
1489 ASSERT((w2 & ~0x3FF) == 0);
1490 w1 |= w2;
1491 *pP = w1;
1492 break;
1493
1494 /* According to the Sun documentation:
1495 R_SPARC_UA32
1496 This relocation type resembles R_SPARC_32, except it refers to an
1497 unaligned word. That is, the word to be relocated must be treated
1498 as four separate bytes with arbitrary alignment, not as a word
1499 aligned according to the architecture requirements.
1500 */
1501 case R_SPARC_UA32:
1502 w2 = (Elf_Word)value;
1503
1504 // SPARC doesn't do misaligned writes of 32 bit words,
1505 // so we have to do this one byte-at-a-time.
1506 char *pPc = (char*)pP;
1507 pPc[0] = (char) ((Elf_Word)(w2 & 0xff000000) >> 24);
1508 pPc[1] = (char) ((Elf_Word)(w2 & 0x00ff0000) >> 16);
1509 pPc[2] = (char) ((Elf_Word)(w2 & 0x0000ff00) >> 8);
1510 pPc[3] = (char) ((Elf_Word)(w2 & 0x000000ff));
1511 break;
1512
1513 case R_SPARC_32:
1514 w2 = (Elf_Word)value;
1515 *pP = w2;
1516 break;
1517 # elif defined(powerpc_HOST_ARCH)
1518 case R_PPC_ADDR16_LO:
1519 *(Elf32_Half*) P = value;
1520 break;
1521
1522 case R_PPC_ADDR16_HI:
1523 *(Elf32_Half*) P = value >> 16;
1524 break;
1525
1526 case R_PPC_ADDR16_HA:
1527 *(Elf32_Half*) P = (value + 0x8000) >> 16;
1528 break;
1529
1530 case R_PPC_ADDR32:
1531 *(Elf32_Word *) P = value;
1532 break;
1533
1534 case R_PPC_REL32:
1535 *(Elf32_Word *) P = value - P;
1536 break;
1537
1538 case R_PPC_PLTREL24:
1539 value -= 0x8000; /* See Note [.LCTOC1 in PPC PIC code] */
1540 FALLTHROUGH;
1541 case R_PPC_REL24:
1542 delta = value - P;
1543
1544 if( delta << 6 >> 6 != delta )
1545 {
1546 value = (Elf_Addr)(&makeSymbolExtra( oc, ELF_R_SYM(info), value )
1547 ->jumpIsland);
1548 delta = value - P;
1549
1550 if( value == 0 || delta << 6 >> 6 != delta )
1551 {
1552 barf( "Unable to make SymbolExtra for #%d",
1553 ELF_R_SYM(info) );
1554 return 0;
1555 }
1556 }
1557
1558 *(Elf_Word *) P = (*(Elf_Word *) P & 0xfc000003)
1559 | (delta & 0x3fffffc);
1560 break;
1561
1562 case R_PPC_REL16_LO:
1563 *(Elf32_Half*) P = value - P;
1564 break;
1565
1566 case R_PPC_REL16_HI:
1567 *(Elf32_Half*) P = (value - P) >> 16;
1568 break;
1569
1570 case R_PPC_REL16_HA:
1571 *(Elf32_Half*) P = (value + 0x8000 - P) >> 16;
1572 break;
1573 # endif
1574
1575 #if defined(x86_64_HOST_ARCH)
1576 case COMPAT_R_X86_64_NONE:
1577 break;
1578
1579 case COMPAT_R_X86_64_64:
1580 {
1581 Elf64_Xword payload = value;
1582 memcpy((void*)P, &payload, sizeof(payload));
1583 break;
1584 }
1585
1586 case COMPAT_R_X86_64_PC32:
1587 {
1588 #if defined(ALWAYS_PIC)
1589 barf("R_X86_64_PC32 relocation, but ALWAYS_PIC.");
1590 #else
1591 StgInt64 off = value - P;
1592 if (off != (Elf64_Sword)off && X86_64_ELF_NONPIC_HACK) {
1593 StgInt64 pltAddress =
1594 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1595 -> jumpIsland;
1596 off = pltAddress + A - P;
1597 }
1598 if (off != (Elf64_Sword)off) {
1599 errorBelch(
1600 "R_X86_64_PC32 relocation out of range: %s = %" PRIx64
1601 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1602 symbol, off, oc->fileName);
1603 return 0;
1604 }
1605 Elf64_Sword payload = off;
1606 memcpy((void*)P, &payload, sizeof(payload));
1607 #endif
1608 break;
1609 }
1610
1611 case COMPAT_R_X86_64_PC64:
1612 {
1613 Elf64_Sxword payload = value - P;
1614 memcpy((void*)P, &payload, sizeof(payload));
1615 break;
1616 }
1617
1618 case COMPAT_R_X86_64_32:
1619 {
1620 #if defined(ALWAYS_PIC)
1621 barf("R_X86_64_32 relocation, but ALWAYS_PIC.");
1622 #else
1623 if (value != (Elf64_Word)value && X86_64_ELF_NONPIC_HACK) {
1624 StgInt64 pltAddress =
1625 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1626 -> jumpIsland;
1627 value = pltAddress + A;
1628 }
1629 if (value != (Elf64_Word)value) {
1630 errorBelch(
1631 "R_X86_64_32 relocation out of range: %s = %" PRIx64
1632 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1633 symbol, value, oc->fileName);
1634 return 0;
1635 }
1636 Elf64_Word payload = value;
1637 memcpy((void*)P, &payload, sizeof(payload));
1638 #endif
1639 break;
1640 }
1641
1642 case COMPAT_R_X86_64_32S:
1643 {
1644 #if defined(ALWAYS_PIC)
1645 barf("R_X86_64_32S relocation, but ALWAYS_PIC.");
1646 #else
1647 if ((StgInt64)value != (Elf64_Sword)value && X86_64_ELF_NONPIC_HACK) {
1648 StgInt64 pltAddress =
1649 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1650 -> jumpIsland;
1651 value = pltAddress + A;
1652 }
1653 if ((StgInt64)value != (Elf64_Sword)value) {
1654 errorBelch(
1655 "R_X86_64_32S relocation out of range: %s = %" PRIx64
1656 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1657 symbol, value, oc->fileName);
1658 return 0;
1659 }
1660 Elf64_Sword payload = value;
1661 memcpy((void*)P, &payload, sizeof(payload));
1662 #endif
1663 break;
1664 }
1665 case COMPAT_R_X86_64_REX_GOTPCRELX:
1666 case COMPAT_R_X86_64_GOTPCRELX:
1667 case COMPAT_R_X86_64_GOTPCREL:
1668 {
1669 StgInt64 gotAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)->addr;
1670 StgInt64 off = gotAddress + A - P;
1671 if (off != (Elf64_Sword)off) {
1672 barf(
1673 "COMPAT_R_X86_64_GOTPCREL relocation out of range: "
1674 "%s = %" PRIx64 " in %s.",
1675 symbol, off, oc->fileName);
1676 }
1677 Elf64_Sword payload = off;
1678 memcpy((void*)P, &payload, sizeof(payload));
1679 break;
1680 }
1681 #if defined(dragonfly_HOST_OS)
1682 case COMPAT_R_X86_64_GOTTPOFF:
1683 {
1684 #if defined(ALWAYS_PIC)
1685 barf("R_X86_64_GOTTPOFF relocation, but ALWAYS_PIC.");
1686 #else
1687 /* determine the offset of S to the current thread's tls
1688 area
1689 XXX: Move this to the beginning of function */
1690 struct tls_info ti;
1691 get_tls_area(0, &ti, sizeof(ti));
1692 /* make entry in GOT that contains said offset */
1693 StgInt64 gotEntry = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info),
1694 (S - (Elf64_Addr)(ti.base)))->addr;
1695 StgInt64 off = gotEntry + A - P;
1696 if (off != (Elf64_Sword)off) {
1697 barf(
1698 "COMPAT_R_X86_64_GOTTPOFF relocation out of range: "
1699 "%s = %" PRIx64 " in %s.",
1700 symbol, off, oc->fileName);
1701 }
1702 Elf64_SWord payload = off;
1703 memcpy((void*)P, &payload, sizeof(payload));
1704 #endif
1705 break;
1706 }
1707 #endif
1708
1709 case COMPAT_R_X86_64_PLT32:
1710 {
1711 #if defined(ALWAYS_PIC)
1712 barf("R_X86_64_PLT32 relocation, but ALWAYS_PIC.");
1713 #else
1714 StgInt64 off = value - P;
1715 if (off != (Elf64_Sword)off) {
1716 StgInt64 pltAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1717 -> jumpIsland;
1718 off = pltAddress + A - P;
1719 }
1720 if (off != (Elf64_Sword)off) {
1721 barf(
1722 "R_X86_64_PLT32 relocation out of range: "
1723 "%s = %" PRIx64 " in %s.",
1724 symbol, off, oc->fileName);
1725 }
1726 Elf64_Sword payload = off;
1727 memcpy((void*)P, &payload, sizeof(payload));
1728 #endif
1729 break;
1730 }
1731 #endif
1732
1733 default:
1734 barf("%s: unhandled ELF relocation(RelA) type %" FMT_Word "\n",
1735 oc->fileName, (W_)ELF_R_TYPE(info));
1736 return 0;
1737 }
1738
1739 }
1740 return 1;
1741 }
1742 #endif /* !aarch64_HOST_ARCH */
1743
1744
1745 int
1746 ocResolve_ELF ( ObjectCode* oc )
1747 {
1748 char* ehdrC = (char*)(oc->image);
1749 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1750 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1751 const Elf_Word shnum = elf_shnum(ehdr);
1752
1753 #if defined(SHN_XINDEX)
1754 Elf_Word* shndxTable = get_shndx_table(ehdr);
1755 #endif
1756
1757 /* resolve section symbols
1758 * these are special symbols that point to sections, and have no name.
1759 * Usually there should be one symbol for each text and data section.
1760 *
1761 * We need to resolve (assign addresses) to them, to be able to use them
1762 * during relocation.
1763 */
1764 for(ElfSymbolTable *symTab = oc->info->symbolTables;
1765 symTab != NULL; symTab = symTab->next) {
1766 for (size_t i = 0; i < symTab->n_symbols; i++) {
1767 ElfSymbol *symbol = &symTab->symbols[i];
1768 if(STT_SECTION == ELF_ST_TYPE(symbol->elf_sym->st_info)) {
1769 /* NOTE: We assume that oc->sections corresponds to the
1770 * sections in the object file. This is currently true,
1771 * and will stay true, unless we start to compress
1772 * oc->sections by not having an entry for sections we
1773 * are not interested in.
1774 */
1775
1776
1777 /* See Note [Many ELF Sections] */
1778 /* Note that future checks for special SHN_* numbers should
1779 * check the shndx variable, not the section number in secno.
1780 * Sections with the real number in the SHN_LORESERVE..HIRESERVE
1781 * range will have shndx SHN_XINDEX and a secno with one of the
1782 * reserved values.
1783 */
1784 Elf_Word secno = symbol->elf_sym->st_shndx;
1785 #if defined(SHN_XINDEX)
1786 if (secno == SHN_XINDEX) {
1787 ASSERT(shndxTable);
1788 secno = shndxTable[i];
1789 }
1790 #endif
1791 ASSERT(symbol->elf_sym->st_name == 0);
1792 ASSERT(symbol->elf_sym->st_value == 0);
1793 symbol->addr = oc->sections[ secno ].start;
1794 }
1795 }
1796 }
1797
1798 #if defined(NEED_GOT)
1799 if(fillGot( oc ))
1800 return 0;
1801 /* silence warnings */
1802 (void) shnum;
1803 (void) shdr;
1804 #endif /* NEED_GOT */
1805
1806 #if defined(aarch64_HOST_ARCH)
1807 /* use new relocation design */
1808 if(relocateObjectCode( oc ))
1809 return 0;
1810 #else
1811 /* Process the relocation sections. */
1812 for (Elf_Word i = 0; i < shnum; i++) {
1813 if (shdr[i].sh_type == SHT_REL) {
1814 bool ok = do_Elf_Rel_relocations ( oc, ehdrC, shdr, i );
1815 if (!ok)
1816 return ok;
1817 }
1818 else
1819 if (shdr[i].sh_type == SHT_RELA) {
1820 bool ok = do_Elf_Rela_relocations ( oc, ehdrC, shdr, i );
1821 if (!ok)
1822 return ok;
1823 }
1824 }
1825 #endif
1826
1827 #if defined(powerpc_HOST_ARCH)
1828 ocFlushInstructionCache( oc );
1829 #endif
1830
1831 return 1;
1832 }
1833
1834 int ocRunInit_ELF( ObjectCode *oc )
1835 {
1836 Elf_Word i;
1837 char* ehdrC = (char*)(oc->image);
1838 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1839 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1840 char* sh_strtab = ehdrC + shdr[elf_shstrndx(ehdr)].sh_offset;
1841 int argc, envc;
1842 char **argv, **envv;
1843
1844 getProgArgv(&argc, &argv);
1845 getProgEnvv(&envc, &envv);
1846
1847 // XXX Apparently in some archs .init may be something
1848 // special! See DL_DT_INIT_ADDRESS macro in glibc
1849 // as well as ELF_FUNCTION_PTR_IS_SPECIAL. We've not handled
1850 // it here, please file a bug report if it affects you.
1851 for (i = 0; i < elf_shnum(ehdr); i++) {
1852 init_t *init_start, *init_end, *init;
1853 int is_bss = false;
1854 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
1855 if (kind == SECTIONKIND_CODE_OR_RODATA
1856 && 0 == memcmp(".init", sh_strtab + shdr[i].sh_name, 5)) {
1857 init_t init_f = (init_t)(oc->sections[i].start);
1858 init_f(argc, argv, envv);
1859 }
1860
1861 if (kind == SECTIONKIND_INIT_ARRAY) {
1862 char *init_startC = oc->sections[i].start;
1863 init_start = (init_t*)init_startC;
1864 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1865 for (init = init_start; init < init_end; init++) {
1866 (*init)(argc, argv, envv);
1867 }
1868 }
1869
1870 // XXX could be more strict and assert that it's
1871 // SECTIONKIND_RWDATA; but allowing RODATA seems harmless enough.
1872 if ((kind == SECTIONKIND_RWDATA || kind == SECTIONKIND_CODE_OR_RODATA)
1873 && 0 == memcmp(".ctors", sh_strtab + shdr[i].sh_name, 6)) {
1874 char *init_startC = oc->sections[i].start;
1875 init_start = (init_t*)init_startC;
1876 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1877 // ctors run in reverse
1878 for (init = init_end - 1; init >= init_start; init--) {
1879 (*init)(argc, argv, envv);
1880 }
1881 }
1882 }
1883
1884 freeProgEnvv(envc, envv);
1885 return 1;
1886 }
1887
1888 /*
1889 * PowerPC & X86_64 ELF specifics
1890 */
1891
1892 #if defined(NEED_SYMBOL_EXTRAS)
1893
1894 int ocAllocateSymbolExtras_ELF( ObjectCode *oc )
1895 {
1896 Elf_Ehdr *ehdr;
1897 Elf_Shdr* shdr;
1898 Elf_Word i, shnum;
1899
1900 ehdr = (Elf_Ehdr *) oc->image;
1901 shdr = (Elf_Shdr *) ( ((char *)oc->image) + ehdr->e_shoff );
1902
1903 shnum = elf_shnum(ehdr);
1904
1905 for( i = 0; i < shnum; i++ )
1906 if( shdr[i].sh_type == SHT_SYMTAB )
1907 break;
1908
1909 if( i == shnum )
1910 {
1911 // Not having a symbol table is not in principle a problem.
1912 // When an object file has no symbols then the 'strip' program
1913 // typically will remove the symbol table entirely.
1914 IF_DEBUG(linker, debugBelch( "The ELF file %s contains no symtab\n",
1915 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName ));
1916 return 1;
1917 }
1918
1919 if( shdr[i].sh_entsize != sizeof( Elf_Sym ) )
1920 {
1921 errorBelch( "The entry size (%d) of the symtab isn't %d\n",
1922 (int) shdr[i].sh_entsize, (int) sizeof( Elf_Sym ) );
1923
1924 return 0;
1925 }
1926
1927 return ocAllocateSymbolExtras( oc, shdr[i].sh_size / sizeof( Elf_Sym ), 0 );
1928 }
1929
1930 #endif /* NEED_SYMBOL_EXTRAS */
1931
1932 #endif /* elf */