97628aecdc3fb8066e2f8e42df230051bb177010
[ghc.git] / includes / CodeGen.Platform.hs
1
2 import CmmExpr
3 #if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
4 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc))
5 import Panic
6 #endif
7 import Reg
8
9 #include "ghcautoconf.h"
10 #include "stg/MachRegs.h"
11
12 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
13
14 # if defined(MACHREGS_i386)
15 # define eax 0
16 # define ebx 1
17 # define ecx 2
18 # define edx 3
19 # define esi 4
20 # define edi 5
21 # define ebp 6
22 # define esp 7
23 # endif
24
25 # if defined(MACHREGS_x86_64)
26 # define rax 0
27 # define rbx 1
28 # define rcx 2
29 # define rdx 3
30 # define rsi 4
31 # define rdi 5
32 # define rbp 6
33 # define rsp 7
34 # define r8 8
35 # define r9 9
36 # define r10 10
37 # define r11 11
38 # define r12 12
39 # define r13 13
40 # define r14 14
41 # define r15 15
42 # endif
43
44 # define fake0 16
45 # define fake1 17
46 # define fake2 18
47 # define fake3 19
48 # define fake4 20
49 # define fake5 21
50
51 # define xmm0 24
52 # define xmm1 25
53 # define xmm2 26
54 # define xmm3 27
55 # define xmm4 28
56 # define xmm5 29
57 # define xmm6 30
58 # define xmm7 31
59 # define xmm8 32
60 # define xmm9 33
61 # define xmm10 34
62 # define xmm11 35
63 # define xmm12 36
64 # define xmm13 37
65 # define xmm14 38
66 # define xmm15 39
67
68 # define ymm0 40
69 # define ymm1 41
70 # define ymm2 42
71 # define ymm3 43
72 # define ymm4 44
73 # define ymm5 45
74 # define ymm6 46
75 # define ymm7 47
76 # define ymm8 48
77 # define ymm9 49
78 # define ymm10 50
79 # define ymm11 51
80 # define ymm12 52
81 # define ymm13 53
82 # define ymm14 54
83 # define ymm15 55
84
85 # define zmm0 56
86 # define zmm1 57
87 # define zmm2 58
88 # define zmm3 59
89 # define zmm4 60
90 # define zmm5 61
91 # define zmm6 62
92 # define zmm7 63
93 # define zmm8 64
94 # define zmm9 65
95 # define zmm10 66
96 # define zmm11 67
97 # define zmm12 68
98 # define zmm13 69
99 # define zmm14 70
100 # define zmm15 71
101
102 -- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs.
103 -- Since it's only used to check 'isJust', the actual values don't matter, thus
104 -- I'm not sure if these are the correct numberings.
105 -- Normally, the register names are just stringified as part of the REG() macro
106
107 #elif defined(MACHREGS_powerpc) || defined(MACHREGS_arm) \
108 || defined(MACHREGS_aarch64)
109
110 # define r0 0
111 # define r1 1
112 # define r2 2
113 # define r3 3
114 # define r4 4
115 # define r5 5
116 # define r6 6
117 # define r7 7
118 # define r8 8
119 # define r9 9
120 # define r10 10
121 # define r11 11
122 # define r12 12
123 # define r13 13
124 # define r14 14
125 # define r15 15
126 # define r16 16
127 # define r17 17
128 # define r18 18
129 # define r19 19
130 # define r20 20
131 # define r21 21
132 # define r22 22
133 # define r23 23
134 # define r24 24
135 # define r25 25
136 # define r26 26
137 # define r27 27
138 # define r28 28
139 # define r29 29
140 # define r30 30
141 # define r31 31
142
143 -- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe
144 -- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG.
145 #if defined(MACHREGS_aarch64) || defined(MACHREGS_arm)
146 # define s0 32
147 # define s1 33
148 # define s2 34
149 # define s3 35
150 # define s4 36
151 # define s5 37
152 # define s6 38
153 # define s7 39
154 # define s8 40
155 # define s9 41
156 # define s10 42
157 # define s11 43
158 # define s12 44
159 # define s13 45
160 # define s14 46
161 # define s15 47
162 # define s16 48
163 # define s17 49
164 # define s18 50
165 # define s19 51
166 # define s20 52
167 # define s21 53
168 # define s22 54
169 # define s23 55
170 # define s24 56
171 # define s25 57
172 # define s26 58
173 # define s27 59
174 # define s28 60
175 # define s29 61
176 # define s30 62
177 # define s31 63
178
179 # define d0 32
180 # define d1 33
181 # define d2 34
182 # define d3 35
183 # define d4 36
184 # define d5 37
185 # define d6 38
186 # define d7 39
187 # define d8 40
188 # define d9 41
189 # define d10 42
190 # define d11 43
191 # define d12 44
192 # define d13 45
193 # define d14 46
194 # define d15 47
195 # define d16 48
196 # define d17 49
197 # define d18 50
198 # define d19 51
199 # define d20 52
200 # define d21 53
201 # define d22 54
202 # define d23 55
203 # define d24 56
204 # define d25 57
205 # define d26 58
206 # define d27 59
207 # define d28 60
208 # define d29 61
209 # define d30 62
210 # define d31 63
211 #endif
212
213 # if defined(MACHREGS_darwin)
214 # define f0 32
215 # define f1 33
216 # define f2 34
217 # define f3 35
218 # define f4 36
219 # define f5 37
220 # define f6 38
221 # define f7 39
222 # define f8 40
223 # define f9 41
224 # define f10 42
225 # define f11 43
226 # define f12 44
227 # define f13 45
228 # define f14 46
229 # define f15 47
230 # define f16 48
231 # define f17 49
232 # define f18 50
233 # define f19 51
234 # define f20 52
235 # define f21 53
236 # define f22 54
237 # define f23 55
238 # define f24 56
239 # define f25 57
240 # define f26 58
241 # define f27 59
242 # define f28 60
243 # define f29 61
244 # define f30 62
245 # define f31 63
246 # else
247 # define fr0 32
248 # define fr1 33
249 # define fr2 34
250 # define fr3 35
251 # define fr4 36
252 # define fr5 37
253 # define fr6 38
254 # define fr7 39
255 # define fr8 40
256 # define fr9 41
257 # define fr10 42
258 # define fr11 43
259 # define fr12 44
260 # define fr13 45
261 # define fr14 46
262 # define fr15 47
263 # define fr16 48
264 # define fr17 49
265 # define fr18 50
266 # define fr19 51
267 # define fr20 52
268 # define fr21 53
269 # define fr22 54
270 # define fr23 55
271 # define fr24 56
272 # define fr25 57
273 # define fr26 58
274 # define fr27 59
275 # define fr28 60
276 # define fr29 61
277 # define fr30 62
278 # define fr31 63
279 # endif
280
281 #elif defined(MACHREGS_sparc)
282
283 # define g0 0
284 # define g1 1
285 # define g2 2
286 # define g3 3
287 # define g4 4
288 # define g5 5
289 # define g6 6
290 # define g7 7
291
292 # define o0 8
293 # define o1 9
294 # define o2 10
295 # define o3 11
296 # define o4 12
297 # define o5 13
298 # define o6 14
299 # define o7 15
300
301 # define l0 16
302 # define l1 17
303 # define l2 18
304 # define l3 19
305 # define l4 20
306 # define l5 21
307 # define l6 22
308 # define l7 23
309
310 # define i0 24
311 # define i1 25
312 # define i2 26
313 # define i3 27
314 # define i4 28
315 # define i5 29
316 # define i6 30
317 # define i7 31
318
319 # define f0 32
320 # define f1 33
321 # define f2 34
322 # define f3 35
323 # define f4 36
324 # define f5 37
325 # define f6 38
326 # define f7 39
327 # define f8 40
328 # define f9 41
329 # define f10 42
330 # define f11 43
331 # define f12 44
332 # define f13 45
333 # define f14 46
334 # define f15 47
335 # define f16 48
336 # define f17 49
337 # define f18 50
338 # define f19 51
339 # define f20 52
340 # define f21 53
341 # define f22 54
342 # define f23 55
343 # define f24 56
344 # define f25 57
345 # define f26 58
346 # define f27 59
347 # define f28 60
348 # define f29 61
349 # define f30 62
350 # define f31 63
351
352 #endif
353
354 callerSaves :: GlobalReg -> Bool
355 #ifdef CALLER_SAVES_Base
356 callerSaves BaseReg = True
357 #endif
358 #ifdef CALLER_SAVES_R1
359 callerSaves (VanillaReg 1 _) = True
360 #endif
361 #ifdef CALLER_SAVES_R2
362 callerSaves (VanillaReg 2 _) = True
363 #endif
364 #ifdef CALLER_SAVES_R3
365 callerSaves (VanillaReg 3 _) = True
366 #endif
367 #ifdef CALLER_SAVES_R4
368 callerSaves (VanillaReg 4 _) = True
369 #endif
370 #ifdef CALLER_SAVES_R5
371 callerSaves (VanillaReg 5 _) = True
372 #endif
373 #ifdef CALLER_SAVES_R6
374 callerSaves (VanillaReg 6 _) = True
375 #endif
376 #ifdef CALLER_SAVES_R7
377 callerSaves (VanillaReg 7 _) = True
378 #endif
379 #ifdef CALLER_SAVES_R8
380 callerSaves (VanillaReg 8 _) = True
381 #endif
382 #ifdef CALLER_SAVES_R9
383 callerSaves (VanillaReg 9 _) = True
384 #endif
385 #ifdef CALLER_SAVES_R10
386 callerSaves (VanillaReg 10 _) = True
387 #endif
388 #ifdef CALLER_SAVES_F1
389 callerSaves (FloatReg 1) = True
390 #endif
391 #ifdef CALLER_SAVES_F2
392 callerSaves (FloatReg 2) = True
393 #endif
394 #ifdef CALLER_SAVES_F3
395 callerSaves (FloatReg 3) = True
396 #endif
397 #ifdef CALLER_SAVES_F4
398 callerSaves (FloatReg 4) = True
399 #endif
400 #ifdef CALLER_SAVES_F5
401 callerSaves (FloatReg 5) = True
402 #endif
403 #ifdef CALLER_SAVES_F6
404 callerSaves (FloatReg 6) = True
405 #endif
406 #ifdef CALLER_SAVES_D1
407 callerSaves (DoubleReg 1) = True
408 #endif
409 #ifdef CALLER_SAVES_D2
410 callerSaves (DoubleReg 2) = True
411 #endif
412 #ifdef CALLER_SAVES_D3
413 callerSaves (DoubleReg 3) = True
414 #endif
415 #ifdef CALLER_SAVES_D4
416 callerSaves (DoubleReg 4) = True
417 #endif
418 #ifdef CALLER_SAVES_D5
419 callerSaves (DoubleReg 5) = True
420 #endif
421 #ifdef CALLER_SAVES_D6
422 callerSaves (DoubleReg 6) = True
423 #endif
424 #ifdef CALLER_SAVES_L1
425 callerSaves (LongReg 1) = True
426 #endif
427 #ifdef CALLER_SAVES_Sp
428 callerSaves Sp = True
429 #endif
430 #ifdef CALLER_SAVES_SpLim
431 callerSaves SpLim = True
432 #endif
433 #ifdef CALLER_SAVES_Hp
434 callerSaves Hp = True
435 #endif
436 #ifdef CALLER_SAVES_HpLim
437 callerSaves HpLim = True
438 #endif
439 #ifdef CALLER_SAVES_CCCS
440 callerSaves CCCS = True
441 #endif
442 #ifdef CALLER_SAVES_CurrentTSO
443 callerSaves CurrentTSO = True
444 #endif
445 #ifdef CALLER_SAVES_CurrentNursery
446 callerSaves CurrentNursery = True
447 #endif
448 callerSaves _ = False
449
450 activeStgRegs :: [GlobalReg]
451 activeStgRegs = [
452 #ifdef REG_Base
453 BaseReg
454 #endif
455 #ifdef REG_Sp
456 ,Sp
457 #endif
458 #ifdef REG_Hp
459 ,Hp
460 #endif
461 #ifdef REG_R1
462 ,VanillaReg 1 VGcPtr
463 #endif
464 #ifdef REG_R2
465 ,VanillaReg 2 VGcPtr
466 #endif
467 #ifdef REG_R3
468 ,VanillaReg 3 VGcPtr
469 #endif
470 #ifdef REG_R4
471 ,VanillaReg 4 VGcPtr
472 #endif
473 #ifdef REG_R5
474 ,VanillaReg 5 VGcPtr
475 #endif
476 #ifdef REG_R6
477 ,VanillaReg 6 VGcPtr
478 #endif
479 #ifdef REG_R7
480 ,VanillaReg 7 VGcPtr
481 #endif
482 #ifdef REG_R8
483 ,VanillaReg 8 VGcPtr
484 #endif
485 #ifdef REG_R9
486 ,VanillaReg 9 VGcPtr
487 #endif
488 #ifdef REG_R10
489 ,VanillaReg 10 VGcPtr
490 #endif
491 #ifdef REG_SpLim
492 ,SpLim
493 #endif
494 #if MAX_REAL_XMM_REG != 0
495 #ifdef REG_F1
496 ,FloatReg 1
497 #endif
498 #ifdef REG_D1
499 ,DoubleReg 1
500 #endif
501 #ifdef REG_XMM1
502 ,XmmReg 1
503 #endif
504 #ifdef REG_YMM1
505 ,YmmReg 1
506 #endif
507 #ifdef REG_ZMM1
508 ,ZmmReg 1
509 #endif
510 #ifdef REG_F2
511 ,FloatReg 2
512 #endif
513 #ifdef REG_D2
514 ,DoubleReg 2
515 #endif
516 #ifdef REG_XMM2
517 ,XmmReg 2
518 #endif
519 #ifdef REG_YMM2
520 ,YmmReg 2
521 #endif
522 #ifdef REG_ZMM2
523 ,ZmmReg 2
524 #endif
525 #ifdef REG_F3
526 ,FloatReg 3
527 #endif
528 #ifdef REG_D3
529 ,DoubleReg 3
530 #endif
531 #ifdef REG_XMM3
532 ,XmmReg 3
533 #endif
534 #ifdef REG_YMM3
535 ,YmmReg 3
536 #endif
537 #ifdef REG_ZMM3
538 ,ZmmReg 3
539 #endif
540 #ifdef REG_F4
541 ,FloatReg 4
542 #endif
543 #ifdef REG_D4
544 ,DoubleReg 4
545 #endif
546 #ifdef REG_XMM4
547 ,XmmReg 4
548 #endif
549 #ifdef REG_YMM4
550 ,YmmReg 4
551 #endif
552 #ifdef REG_ZMM4
553 ,ZmmReg 4
554 #endif
555 #ifdef REG_F5
556 ,FloatReg 5
557 #endif
558 #ifdef REG_D5
559 ,DoubleReg 5
560 #endif
561 #ifdef REG_XMM5
562 ,XmmReg 5
563 #endif
564 #ifdef REG_YMM5
565 ,YmmReg 5
566 #endif
567 #ifdef REG_ZMM5
568 ,ZmmReg 5
569 #endif
570 #ifdef REG_F6
571 ,FloatReg 6
572 #endif
573 #ifdef REG_D6
574 ,DoubleReg 6
575 #endif
576 #ifdef REG_XMM6
577 ,XmmReg 6
578 #endif
579 #ifdef REG_YMM6
580 ,YmmReg 6
581 #endif
582 #ifdef REG_ZMM6
583 ,ZmmReg 6
584 #endif
585 #else /* MAX_REAL_XMM_REG == 0 */
586 #ifdef REG_F1
587 ,FloatReg 1
588 #endif
589 #ifdef REG_F2
590 ,FloatReg 2
591 #endif
592 #ifdef REG_F3
593 ,FloatReg 3
594 #endif
595 #ifdef REG_F4
596 ,FloatReg 4
597 #endif
598 #ifdef REG_F5
599 ,FloatReg 5
600 #endif
601 #ifdef REG_F6
602 ,FloatReg 6
603 #endif
604 #ifdef REG_D1
605 ,DoubleReg 1
606 #endif
607 #ifdef REG_D2
608 ,DoubleReg 2
609 #endif
610 #ifdef REG_D3
611 ,DoubleReg 3
612 #endif
613 #ifdef REG_D4
614 ,DoubleReg 4
615 #endif
616 #ifdef REG_D5
617 ,DoubleReg 5
618 #endif
619 #ifdef REG_D6
620 ,DoubleReg 6
621 #endif
622 #endif /* MAX_REAL_XMM_REG == 0 */
623 ]
624
625 haveRegBase :: Bool
626 #ifdef REG_Base
627 haveRegBase = True
628 #else
629 haveRegBase = False
630 #endif
631
632 -- | Returns 'Nothing' if this global register is not stored
633 -- in a real machine register, otherwise returns @'Just' reg@, where
634 -- reg is the machine register it is stored in.
635 globalRegMaybe :: GlobalReg -> Maybe RealReg
636 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
637 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \
638 || defined(MACHREGS_arm) || defined(MACHREGS_aarch64)
639 # ifdef REG_Base
640 globalRegMaybe BaseReg = Just (RealRegSingle REG_Base)
641 # endif
642 # ifdef REG_R1
643 globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1)
644 # endif
645 # ifdef REG_R2
646 globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2)
647 # endif
648 # ifdef REG_R3
649 globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3)
650 # endif
651 # ifdef REG_R4
652 globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4)
653 # endif
654 # ifdef REG_R5
655 globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5)
656 # endif
657 # ifdef REG_R6
658 globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6)
659 # endif
660 # ifdef REG_R7
661 globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7)
662 # endif
663 # ifdef REG_R8
664 globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8)
665 # endif
666 # ifdef REG_R9
667 globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9)
668 # endif
669 # ifdef REG_R10
670 globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10)
671 # endif
672 # ifdef REG_F1
673 globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1)
674 # endif
675 # ifdef REG_F2
676 globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2)
677 # endif
678 # ifdef REG_F3
679 globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3)
680 # endif
681 # ifdef REG_F4
682 globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4)
683 # endif
684 # ifdef REG_F5
685 globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5)
686 # endif
687 # ifdef REG_F6
688 globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6)
689 # endif
690 # ifdef REG_D1
691 globalRegMaybe (DoubleReg 1) =
692 # if defined(MACHREGS_sparc)
693 Just (RealRegPair REG_D1 (REG_D1 + 1))
694 # else
695 Just (RealRegSingle REG_D1)
696 # endif
697 # endif
698 # ifdef REG_D2
699 globalRegMaybe (DoubleReg 2) =
700 # if defined(MACHREGS_sparc)
701 Just (RealRegPair REG_D2 (REG_D2 + 1))
702 # else
703 Just (RealRegSingle REG_D2)
704 # endif
705 # endif
706 # ifdef REG_D3
707 globalRegMaybe (DoubleReg 3) =
708 # if defined(MACHREGS_sparc)
709 Just (RealRegPair REG_D3 (REG_D3 + 1))
710 # else
711 Just (RealRegSingle REG_D3)
712 # endif
713 # endif
714 # ifdef REG_D4
715 globalRegMaybe (DoubleReg 4) =
716 # if defined(MACHREGS_sparc)
717 Just (RealRegPair REG_D4 (REG_D4 + 1))
718 # else
719 Just (RealRegSingle REG_D4)
720 # endif
721 # endif
722 # ifdef REG_D5
723 globalRegMaybe (DoubleReg 5) =
724 # if defined(MACHREGS_sparc)
725 Just (RealRegPair REG_D5 (REG_D5 + 1))
726 # else
727 Just (RealRegSingle REG_D5)
728 # endif
729 # endif
730 # ifdef REG_D6
731 globalRegMaybe (DoubleReg 6) =
732 # if defined(MACHREGS_sparc)
733 Just (RealRegPair REG_D6 (REG_D6 + 1))
734 # else
735 Just (RealRegSingle REG_D6)
736 # endif
737 # endif
738 # if MAX_REAL_XMM_REG != 0
739 # ifdef REG_XMM1
740 globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1)
741 # endif
742 # ifdef REG_XMM2
743 globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2)
744 # endif
745 # ifdef REG_XMM3
746 globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3)
747 # endif
748 # ifdef REG_XMM4
749 globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4)
750 # endif
751 # ifdef REG_XMM5
752 globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5)
753 # endif
754 # ifdef REG_XMM6
755 globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6)
756 # endif
757 # endif
758 # if defined(MAX_REAL_YMM_REG) && MAX_REAL_YMM_REG != 0
759 # ifdef REG_YMM1
760 globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1)
761 # endif
762 # ifdef REG_YMM2
763 globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2)
764 # endif
765 # ifdef REG_YMM3
766 globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3)
767 # endif
768 # ifdef REG_YMM4
769 globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4)
770 # endif
771 # ifdef REG_YMM5
772 globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5)
773 # endif
774 # ifdef REG_YMM6
775 globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6)
776 # endif
777 # endif
778 # if defined(MAX_REAL_ZMM_REG) && MAX_REAL_ZMM_REG != 0
779 # ifdef REG_ZMM1
780 globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1)
781 # endif
782 # ifdef REG_ZMM2
783 globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2)
784 # endif
785 # ifdef REG_ZMM3
786 globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3)
787 # endif
788 # ifdef REG_ZMM4
789 globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4)
790 # endif
791 # ifdef REG_ZMM5
792 globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5)
793 # endif
794 # ifdef REG_ZMM6
795 globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6)
796 # endif
797 # endif
798 # ifdef REG_Sp
799 globalRegMaybe Sp = Just (RealRegSingle REG_Sp)
800 # endif
801 # ifdef REG_Lng1
802 globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1)
803 # endif
804 # ifdef REG_Lng2
805 globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2)
806 # endif
807 # ifdef REG_SpLim
808 globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim)
809 # endif
810 # ifdef REG_Hp
811 globalRegMaybe Hp = Just (RealRegSingle REG_Hp)
812 # endif
813 # ifdef REG_HpLim
814 globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim)
815 # endif
816 # ifdef REG_CurrentTSO
817 globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO)
818 # endif
819 # ifdef REG_CurrentNursery
820 globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery)
821 # endif
822 # ifdef REG_MachSp
823 globalRegMaybe MachSp = Just (RealRegSingle REG_MachSp)
824 # endif
825 globalRegMaybe _ = Nothing
826 #elif defined(MACHREGS_NO_REGS)
827 globalRegMaybe _ = Nothing
828 #else
829 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
830 #endif
831
832 freeReg :: RegNo -> Bool
833
834 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
835
836 # if defined(MACHREGS_i386)
837 freeReg esp = False -- %esp is the C stack pointer
838 freeReg esi = False -- Note [esi/edi not allocatable]
839 freeReg edi = False
840 # endif
841 # if defined(MACHREGS_x86_64)
842 freeReg rsp = False -- %rsp is the C stack pointer
843 # endif
844
845 {-
846 Note [esi/edi not allocatable]
847
848 %esi is mapped to R1, so %esi would normally be allocatable while it
849 is not being used for R1. However, %esi has no 8-bit version on x86,
850 and the linear register allocator is not sophisticated enough to
851 handle this irregularity (we need more RegClasses). The
852 graph-colouring allocator also cannot handle this - it was designed
853 with more flexibility in mind, but the current implementation is
854 restricted to the same set of classes as the linear allocator.
855
856 Hence, on x86 esi and edi are treated as not allocatable.
857 -}
858
859 -- split patterns in two functions to prevent overlaps
860 freeReg r = freeRegBase r
861
862 freeRegBase :: RegNo -> Bool
863 # ifdef REG_Base
864 freeRegBase REG_Base = False
865 # endif
866 # ifdef REG_Sp
867 freeRegBase REG_Sp = False
868 # endif
869 # ifdef REG_SpLim
870 freeRegBase REG_SpLim = False
871 # endif
872 # ifdef REG_Hp
873 freeRegBase REG_Hp = False
874 # endif
875 # ifdef REG_HpLim
876 freeRegBase REG_HpLim = False
877 # endif
878 -- All other regs are considered to be "free", because we can track
879 -- their liveness accurately.
880 freeRegBase _ = True
881
882 #elif defined(MACHREGS_powerpc)
883
884 freeReg 0 = False -- Used by code setting the back chain pointer
885 -- in stack reallocations on Linux
886 -- r0 is not usable in all insns so also reserved
887 -- on Darwin.
888 freeReg 1 = False -- The Stack Pointer
889 # if !defined(MACHREGS_darwin)
890 -- most non-darwin powerpc OSes use r2 as a TOC pointer or something like that
891 freeReg 2 = False
892 freeReg 13 = False -- reserved for system thread ID on 64 bit
893 -- at least linux in -fPIC relies on r30 in PLT stubs
894 freeReg 30 = False
895 {- TODO: reserve r13 on 64 bit systems only and r30 on 32 bit respectively.
896 For now we use r30 on 64 bit and r13 on 32 bit as a temporary register
897 in stack handling code. See compiler/nativeGen/PPC/Ppr.hs.
898
899 Later we might want to reserve r13 and r30 only where it is required.
900 Then use r12 as temporary register, which is also what the C ABI does.
901 -}
902
903 # endif
904 # ifdef REG_Base
905 freeReg REG_Base = False
906 # endif
907 # ifdef REG_R1
908 freeReg REG_R1 = False
909 # endif
910 # ifdef REG_R2
911 freeReg REG_R2 = False
912 # endif
913 # ifdef REG_R3
914 freeReg REG_R3 = False
915 # endif
916 # ifdef REG_R4
917 freeReg REG_R4 = False
918 # endif
919 # ifdef REG_R5
920 freeReg REG_R5 = False
921 # endif
922 # ifdef REG_R6
923 freeReg REG_R6 = False
924 # endif
925 # ifdef REG_R7
926 freeReg REG_R7 = False
927 # endif
928 # ifdef REG_R8
929 freeReg REG_R8 = False
930 # endif
931 # ifdef REG_R9
932 freeReg REG_R9 = False
933 # endif
934 # ifdef REG_R10
935 freeReg REG_R10 = False
936 # endif
937 # ifdef REG_F1
938 freeReg REG_F1 = False
939 # endif
940 # ifdef REG_F2
941 freeReg REG_F2 = False
942 # endif
943 # ifdef REG_F3
944 freeReg REG_F3 = False
945 # endif
946 # ifdef REG_F4
947 freeReg REG_F4 = False
948 # endif
949 # ifdef REG_F5
950 freeReg REG_F5 = False
951 # endif
952 # ifdef REG_F6
953 freeReg REG_F6 = False
954 # endif
955 # ifdef REG_D1
956 freeReg REG_D1 = False
957 # endif
958 # ifdef REG_D2
959 freeReg REG_D2 = False
960 # endif
961 # ifdef REG_D3
962 freeReg REG_D3 = False
963 # endif
964 # ifdef REG_D4
965 freeReg REG_D4 = False
966 # endif
967 # ifdef REG_D5
968 freeReg REG_D5 = False
969 # endif
970 # ifdef REG_D6
971 freeReg REG_D6 = False
972 # endif
973 # ifdef REG_Sp
974 freeReg REG_Sp = False
975 # endif
976 # ifdef REG_Su
977 freeReg REG_Su = False
978 # endif
979 # ifdef REG_SpLim
980 freeReg REG_SpLim = False
981 # endif
982 # ifdef REG_Hp
983 freeReg REG_Hp = False
984 # endif
985 # ifdef REG_HpLim
986 freeReg REG_HpLim = False
987 # endif
988 freeReg _ = True
989
990 #elif defined(MACHREGS_sparc)
991
992 -- SPARC regs used by the OS / ABI
993 -- %g0(r0) is always zero
994 freeReg g0 = False
995
996 -- %g5(r5) - %g7(r7)
997 -- are reserved for the OS
998 freeReg g5 = False
999 freeReg g6 = False
1000 freeReg g7 = False
1001
1002 -- %o6(r14)
1003 -- is the C stack pointer
1004 freeReg o6 = False
1005
1006 -- %o7(r15)
1007 -- holds the C return address
1008 freeReg o7 = False
1009
1010 -- %i6(r30)
1011 -- is the C frame pointer
1012 freeReg i6 = False
1013
1014 -- %i7(r31)
1015 -- is used for C return addresses
1016 freeReg i7 = False
1017
1018 -- %f0(r32) - %f1(r32)
1019 -- are C floating point return regs
1020 freeReg f0 = False
1021 freeReg f1 = False
1022
1023 {-
1024 freeReg regNo
1025 -- don't release high half of double regs
1026 | regNo >= f0
1027 , regNo < NCG_FirstFloatReg
1028 , regNo `mod` 2 /= 0
1029 = False
1030 -}
1031
1032 # ifdef REG_Base
1033 freeReg REG_Base = False
1034 # endif
1035 # ifdef REG_R1
1036 freeReg REG_R1 = False
1037 # endif
1038 # ifdef REG_R2
1039 freeReg REG_R2 = False
1040 # endif
1041 # ifdef REG_R3
1042 freeReg REG_R3 = False
1043 # endif
1044 # ifdef REG_R4
1045 freeReg REG_R4 = False
1046 # endif
1047 # ifdef REG_R5
1048 freeReg REG_R5 = False
1049 # endif
1050 # ifdef REG_R6
1051 freeReg REG_R6 = False
1052 # endif
1053 # ifdef REG_R7
1054 freeReg REG_R7 = False
1055 # endif
1056 # ifdef REG_R8
1057 freeReg REG_R8 = False
1058 # endif
1059 # ifdef REG_R9
1060 freeReg REG_R9 = False
1061 # endif
1062 # ifdef REG_R10
1063 freeReg REG_R10 = False
1064 # endif
1065 # ifdef REG_F1
1066 freeReg REG_F1 = False
1067 # endif
1068 # ifdef REG_F2
1069 freeReg REG_F2 = False
1070 # endif
1071 # ifdef REG_F3
1072 freeReg REG_F3 = False
1073 # endif
1074 # ifdef REG_F4
1075 freeReg REG_F4 = False
1076 # endif
1077 # ifdef REG_F5
1078 freeReg REG_F5 = False
1079 # endif
1080 # ifdef REG_F6
1081 freeReg REG_F6 = False
1082 # endif
1083 # ifdef REG_D1
1084 freeReg REG_D1 = False
1085 # endif
1086 # ifdef REG_D1_2
1087 freeReg REG_D1_2 = False
1088 # endif
1089 # ifdef REG_D2
1090 freeReg REG_D2 = False
1091 # endif
1092 # ifdef REG_D2_2
1093 freeReg REG_D2_2 = False
1094 # endif
1095 # ifdef REG_D3
1096 freeReg REG_D3 = False
1097 # endif
1098 # ifdef REG_D3_2
1099 freeReg REG_D3_2 = False
1100 # endif
1101 # ifdef REG_D4
1102 freeReg REG_D4 = False
1103 # endif
1104 # ifdef REG_D4_2
1105 freeReg REG_D4_2 = False
1106 # endif
1107 # ifdef REG_D5
1108 freeReg REG_D5 = False
1109 # endif
1110 # ifdef REG_D5_2
1111 freeReg REG_D5_2 = False
1112 # endif
1113 # ifdef REG_D6
1114 freeReg REG_D6 = False
1115 # endif
1116 # ifdef REG_D6_2
1117 freeReg REG_D6_2 = False
1118 # endif
1119 # ifdef REG_Sp
1120 freeReg REG_Sp = False
1121 # endif
1122 # ifdef REG_Su
1123 freeReg REG_Su = False
1124 # endif
1125 # ifdef REG_SpLim
1126 freeReg REG_SpLim = False
1127 # endif
1128 # ifdef REG_Hp
1129 freeReg REG_Hp = False
1130 # endif
1131 # ifdef REG_HpLim
1132 freeReg REG_HpLim = False
1133 # endif
1134 freeReg _ = True
1135
1136 #else
1137
1138 freeReg = panic "freeReg not defined for this platform"
1139
1140 #endif
1141