Revert "Add a RTS option -xp to load PIC object anywhere in address space"
[ghc.git] / rts / linker / Elf.c
1 #include "Rts.h"
2
3 #if defined(linux_HOST_OS) || defined(solaris2_HOST_OS) \
4 || defined(linux_android_HOST_OS) \
5 || defined(freebsd_HOST_OS) || defined(kfreebsdgnu_HOST_OS) \
6 || defined(dragonfly_HOST_OS) || defined(netbsd_HOST_OS) \
7 || defined(openbsd_HOST_OS) || defined(gnu_HOST_OS)
8
9 // It is essential that this is included before any <elf.h> is included. <elf.h>
10 // defines R_XXX relocations, which would interfere with the COMPAT_R_XXX
11 // relocations we generate. E.g. COMPAT_ ## R_ARM_ARM32 would end up as
12 // const unsigned COMPAT_3 = 0x03; instead of
13 // const unsigned COMPAT_R_ARM_ARM32 = 0x03;
14 #include "elf_compat.h"
15
16 #include "RtsUtils.h"
17 #include "RtsSymbolInfo.h"
18 #include "linker/Elf.h"
19 #include "linker/CacheFlush.h"
20 #include "linker/M32Alloc.h"
21 #include "linker/SymbolExtras.h"
22 #include "sm/OSMem.h"
23 #include "GetEnv.h"
24 #include "linker/util.h"
25 #include "linker/elf_util.h"
26
27 #include <stdlib.h>
28 #include <string.h>
29 #if defined(HAVE_SYS_STAT_H)
30 #include <sys/stat.h>
31 #endif
32 #if defined(HAVE_SYS_TYPES_H)
33 #include <sys/types.h>
34 #endif
35 #if defined(HAVE_FCNTL_H)
36 #include <fcntl.h>
37 #endif
38 #if defined(dragonfly_HOST_OS)
39 #include <sys/tls.h>
40 #endif
41
42 /* on x86_64 we have a problem with relocating symbol references in
43 * code that was compiled without -fPIC. By default, the small memory
44 * model is used, which assumes that symbol references can fit in a
45 * 32-bit slot. The system dynamic linker makes this work for
46 * references to shared libraries by either (a) allocating a jump
47 * table slot for code references, or (b) moving the symbol at load
48 * time (and copying its contents, if necessary) for data references.
49 *
50 * We unfortunately can't tell whether symbol references are to code
51 * or data. So for now we assume they are code (the vast majority
52 * are), and allocate jump-table slots. Unfortunately this will
53 * SILENTLY generate crashing code for data references. This hack is
54 * enabled by X86_64_ELF_NONPIC_HACK.
55 *
56 * One workaround is to use shared Haskell libraries. This is
57 * coming. Another workaround is to keep the static libraries but
58 * compile them with -fPIC, because that will generate PIC references
59 * to data which can be relocated. The PIC code is still too green to
60 * do this systematically, though.
61 *
62 * See bug #781
63 * See thread http://www.haskell.org/pipermail/cvs-ghc/2007-September/038458.html
64 *
65 * Naming Scheme for Symbol Macros
66 *
67 * SymI_*: symbol is internal to the RTS. It resides in an object
68 * file/library that is statically.
69 * SymE_*: symbol is external to the RTS library. It might be linked
70 * dynamically.
71 *
72 * Sym*_HasProto : the symbol prototype is imported in an include file
73 * or defined explicitly
74 * Sym*_NeedsProto: the symbol is undefined and we add a dummy
75 * default proto extern void sym(void);
76 */
77 #define X86_64_ELF_NONPIC_HACK 1
78
79 #if defined(sparc_HOST_ARCH)
80 # define ELF_TARGET_SPARC /* Used inside <elf.h> */
81 #elif defined(i386_HOST_ARCH)
82 # define ELF_TARGET_386 /* Used inside <elf.h> */
83 #elif defined(x86_64_HOST_ARCH)
84 # define ELF_TARGET_X64_64
85 # define ELF_TARGET_AMD64 /* Used inside <elf.h> on Solaris 11 */
86 #endif
87
88 #if !defined(openbsd_HOST_OS)
89 # include <elf.h>
90 #else
91 /* openbsd elf has things in different places, with diff names */
92 # include <elf_abi.h>
93 #endif
94
95 #if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
96 # define NEED_GOT
97 # define NEED_PLT
98 # include "elf_got.h"
99 # include "elf_plt.h"
100 # include "elf_reloc.h"
101 #endif
102
103 /*
104
105 Note [Many ELF Sections]
106
107 The normal section number fields in ELF are limited to 16 bits, which runs
108 out of bits when you try to cram in more sections than that.
109
110 To solve this, the fields e_shnum and e_shstrndx in the ELF header have an
111 escape value (different for each case), and the actual section number is
112 stashed into unused fields in the first section header.
113
114 For symbols, there seems to have been no place in the actual symbol table
115 for the extra bits, so the indexes have been moved into an auxiliary
116 section instead.
117 For symbols in sections beyond 0xff00, the symbol's st_shndx will be an
118 escape value (SHN_XINDEX), and the actual 32-bit section number for symbol N
119 is stored at index N in the SHT_SYMTAB_SHNDX table.
120
121 These extensions seem to be undocumented in version 4.1 of the ABI and only
122 appear in the drafts for the "next" version:
123 https://refspecs.linuxfoundation.org/elf/gabi4+/contents.html
124
125 */
126
127 static Elf_Word elf_shnum(Elf_Ehdr* ehdr)
128 {
129 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
130 Elf_Half shnum = ehdr->e_shnum;
131 return shnum != SHN_UNDEF ? shnum : shdr[0].sh_size;
132 }
133
134 static Elf_Word elf_shstrndx(Elf_Ehdr* ehdr)
135 {
136 Elf_Half shstrndx = ehdr->e_shstrndx;
137 #if defined(SHN_XINDEX)
138 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
139 return shstrndx != SHN_XINDEX ? shstrndx : shdr[0].sh_link;
140 #else
141 // some OSes do not support SHN_XINDEX yet, let's revert to
142 // old way
143 return shstrndx;
144 #endif
145 }
146
147 #if defined(SHN_XINDEX)
148 static Elf_Word*
149 get_shndx_table(Elf_Ehdr* ehdr)
150 {
151 Elf_Word i;
152 char* ehdrC = (char*)ehdr;
153 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
154 const Elf_Word shnum = elf_shnum(ehdr);
155
156 for (i = 0; i < shnum; i++) {
157 if (shdr[i].sh_type == SHT_SYMTAB_SHNDX) {
158 return (Elf32_Word*)(ehdrC + shdr[i].sh_offset);
159 }
160 }
161 return NULL;
162 }
163 #endif
164
165 /*
166 * ocInit and ocDeinit
167 */
168
169 void
170 ocInit_ELF(ObjectCode * oc)
171 {
172 oc->info = (struct ObjectCodeFormatInfo*)stgCallocBytes(
173 1, sizeof *oc->info,
174 "ocInit_Elf(ObjectCodeFormatInfo)");
175 // TODO: fill info
176 oc->info->elfHeader = (Elf_Ehdr *)oc->image;
177 oc->info->programHeader = (Elf_Phdr *) ((uint8_t*)oc->image
178 + oc->info->elfHeader->e_phoff);
179 oc->info->sectionHeader = (Elf_Shdr *) ((uint8_t*)oc->image
180 + oc->info->elfHeader->e_shoff);
181 oc->info->sectionHeaderStrtab = (char*)((uint8_t*)oc->image +
182 oc->info->sectionHeader[oc->info->elfHeader->e_shstrndx].sh_offset);
183
184 oc->n_sections = elf_shnum(oc->info->elfHeader);
185
186 /* get the symbol table(s) */
187 for(int i=0; i < oc->n_sections; i++) {
188 if(SHT_REL == oc->info->sectionHeader[i].sh_type) {
189 ElfRelocationTable *relTab = (ElfRelocationTable *)stgCallocBytes(
190 1, sizeof(ElfRelocationTable),
191 "ocInit_Elf(ElfRelocationTable");
192 relTab->index = i;
193
194 relTab->relocations =
195 (Elf_Rel*) ((uint8_t*)oc->info->elfHeader
196 + oc->info->sectionHeader[i].sh_offset);
197 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
198 / sizeof(Elf_Rel);
199 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
200
201 relTab->sectionHeader = &oc->info->sectionHeader[i];
202
203 if(oc->info->relTable == NULL) {
204 oc->info->relTable = relTab;
205 } else {
206 ElfRelocationTable * tail = oc->info->relTable;
207 while(tail->next != NULL) tail = tail->next;
208 tail->next = relTab;
209 }
210
211 } else if(SHT_RELA == oc->info->sectionHeader[i].sh_type) {
212 ElfRelocationATable *relTab = (ElfRelocationATable *)stgCallocBytes(
213 1, sizeof(ElfRelocationATable),
214 "ocInit_Elf(ElfRelocationTable");
215 relTab->index = i;
216
217 relTab->relocations =
218 (Elf_Rela*) ((uint8_t*)oc->info->elfHeader
219 + oc->info->sectionHeader[i].sh_offset);
220 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
221 / sizeof(Elf_Rela);
222 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
223
224 relTab->sectionHeader = &oc->info->sectionHeader[i];
225
226 if(oc->info->relaTable == NULL) {
227 oc->info->relaTable = relTab;
228 } else {
229 ElfRelocationATable * tail = oc->info->relaTable;
230 while(tail->next != NULL) tail = tail->next;
231 tail->next = relTab;
232 }
233
234 } else if(SHT_SYMTAB == oc->info->sectionHeader[i].sh_type) {
235
236 ElfSymbolTable *symTab = (ElfSymbolTable *)stgCallocBytes(
237 1, sizeof(ElfSymbolTable),
238 "ocInit_Elf(ElfSymbolTable");
239
240 symTab->index = i; /* store the original index, so we can later
241 * find or assert that we are dealing with the
242 * correct symbol table */
243
244 Elf_Sym *stab = (Elf_Sym*)((uint8_t*)oc->info->elfHeader
245 + oc->info->sectionHeader[i].sh_offset);
246 symTab->n_symbols = oc->info->sectionHeader[i].sh_size
247 / sizeof(Elf_Sym);
248 symTab->symbols = (ElfSymbol *)stgCallocBytes(
249 symTab->n_symbols, sizeof(ElfSymbol),
250 "ocInit_Elf(ElfSymbol)");
251
252 /* get the strings table */
253 size_t lnkIdx = oc->info->sectionHeader[i].sh_link;
254 symTab->names = (char*)(uint8_t*)oc->info->elfHeader
255 + oc->info->sectionHeader[lnkIdx].sh_offset;
256
257 /* build the ElfSymbols from the symbols */
258 for(size_t j=0; j < symTab->n_symbols; j++) {
259
260 symTab->symbols[j].name = stab[j].st_name == 0
261 ? "(noname)"
262 : symTab->names + stab[j].st_name;
263 symTab->symbols[j].elf_sym = &stab[j];
264 /* we don't have an address for this symbol yet; this will be
265 * populated during ocGetNames. hence addr = NULL.
266 */
267 symTab->symbols[j].addr = NULL;
268 symTab->symbols[j].got_addr = NULL;
269 }
270
271 /* append the ElfSymbolTable */
272 if(oc->info->symbolTables == NULL) {
273 oc->info->symbolTables = symTab;
274 } else {
275 ElfSymbolTable * tail = oc->info->symbolTables;
276 while(tail->next != NULL) tail = tail->next;
277 tail->next = symTab;
278 }
279 }
280 }
281 }
282
283 void
284 ocDeinit_ELF(ObjectCode * oc)
285 {
286 /* free all ElfSymbolTables, and their associated
287 * ElfSymbols
288 */
289 if(oc->info != NULL) {
290 #if defined(NEED_GOT)
291 freeGot(oc);
292 #endif
293 ElfSymbolTable * last = oc->info->symbolTables;
294
295 while(last != NULL) {
296 ElfSymbolTable * t = last;
297 last = last->next;
298 stgFree(t->symbols);
299 stgFree(t);
300 }
301
302 {
303 ElfRelocationTable *last = oc->info->relTable;
304 while (last != NULL) {
305 ElfRelocationTable *t = last;
306 last = last->next;
307 stgFree(t);
308 }
309 }
310
311 {
312 ElfRelocationATable *last = oc->info->relaTable;
313 while (last != NULL) {
314 ElfRelocationATable *t = last;
315 last = last->next;
316 stgFree(t);
317 }
318 }
319
320 stgFree(oc->info);
321 }
322 }
323
324 /*
325 * Generic ELF functions
326 */
327
328 int
329 ocVerifyImage_ELF ( ObjectCode* oc )
330 {
331 Elf_Shdr* shdr;
332 Elf_Sym* stab;
333 int j, nent, nstrtab, nsymtabs;
334 Elf_Word i, shnum, shstrndx;
335 char* sh_strtab;
336
337 char* ehdrC = (char*)(oc->image);
338 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
339
340 if (ehdr->e_ident[EI_MAG0] != ELFMAG0 ||
341 ehdr->e_ident[EI_MAG1] != ELFMAG1 ||
342 ehdr->e_ident[EI_MAG2] != ELFMAG2 ||
343 ehdr->e_ident[EI_MAG3] != ELFMAG3) {
344 errorBelch("%s: not an ELF object", oc->fileName);
345 return 0;
346 }
347
348 if (ehdr->e_ident[EI_CLASS] != ELFCLASS) {
349 errorBelch("%s: unsupported ELF format", oc->fileName);
350 return 0;
351 }
352
353 if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) {
354 IF_DEBUG(linker,debugBelch( "Is little-endian\n" ));
355 } else
356 if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) {
357 IF_DEBUG(linker,debugBelch( "Is big-endian\n" ));
358 } else {
359 errorBelch("%s: unknown endianness", oc->fileName);
360 return 0;
361 }
362
363 if (ehdr->e_type != ET_REL) {
364 errorBelch("%s: not a relocatable object (.o) file", oc->fileName);
365 return 0;
366 }
367 IF_DEBUG(linker, debugBelch( "Is a relocatable object (.o) file\n" ));
368
369 IF_DEBUG(linker,debugBelch( "Architecture is " ));
370 switch (ehdr->e_machine) {
371 #if defined(EM_ARM)
372 case EM_ARM: IF_DEBUG(linker,debugBelch( "arm" )); break;
373 #endif
374 case EM_386: IF_DEBUG(linker,debugBelch( "x86" )); break;
375 #if defined(EM_SPARC32PLUS)
376 case EM_SPARC32PLUS:
377 #endif
378 case EM_SPARC: IF_DEBUG(linker,debugBelch( "sparc" )); break;
379 #if defined(EM_IA_64)
380 case EM_IA_64: IF_DEBUG(linker,debugBelch( "ia64" )); break;
381 #endif
382 case EM_PPC: IF_DEBUG(linker,debugBelch( "powerpc32" )); break;
383 #if defined(EM_PPC64)
384 case EM_PPC64: IF_DEBUG(linker,debugBelch( "powerpc64" ));
385 errorBelch("%s: RTS linker not implemented on PowerPC 64-bit",
386 oc->fileName);
387 return 0;
388 #endif
389 #if defined(EM_X86_64)
390 case EM_X86_64: IF_DEBUG(linker,debugBelch( "x86_64" )); break;
391 #elif defined(EM_AMD64)
392 case EM_AMD64: IF_DEBUG(linker,debugBelch( "amd64" )); break;
393 #endif
394 #if defined(EM_AARCH64)
395 case EM_AARCH64: IF_DEBUG(linker,debugBelch( "aarch64" )); break;
396 #endif
397 default: IF_DEBUG(linker,debugBelch( "unknown" ));
398 errorBelch("%s: unknown architecture (e_machine == %d)"
399 , oc->fileName, ehdr->e_machine);
400 return 0;
401 }
402
403 shnum = elf_shnum(ehdr);
404 IF_DEBUG(linker,debugBelch(
405 "\nSection header table: start %ld, n_entries %d, ent_size %d\n",
406 (long)ehdr->e_shoff, shnum, ehdr->e_shentsize ));
407
408 ASSERT(ehdr->e_shentsize == sizeof(Elf_Shdr));
409
410 shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
411
412 shstrndx = elf_shstrndx(ehdr);
413 if (shstrndx == SHN_UNDEF) {
414 errorBelch("%s: no section header string table", oc->fileName);
415 return 0;
416 } else {
417 IF_DEBUG(linker,debugBelch( "Section header string table is section %d\n",
418 shstrndx));
419 sh_strtab = ehdrC + shdr[shstrndx].sh_offset;
420 }
421
422 for (i = 0; i < shnum; i++) {
423 IF_DEBUG(linker,debugBelch("%2d: ", i ));
424 IF_DEBUG(linker,debugBelch("type=%2d ", (int)shdr[i].sh_type ));
425 IF_DEBUG(linker,debugBelch("size=%4d ", (int)shdr[i].sh_size ));
426 IF_DEBUG(linker,debugBelch("offs=%4d ", (int)shdr[i].sh_offset ));
427 IF_DEBUG(linker,debugBelch(" (%p .. %p) ",
428 ehdrC + shdr[i].sh_offset,
429 ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1));
430
431 #define SECTION_INDEX_VALID(ndx) (ndx > SHN_UNDEF && ndx < shnum)
432
433 switch (shdr[i].sh_type) {
434
435 case SHT_REL:
436 case SHT_RELA:
437 IF_DEBUG(linker,debugBelch( shdr[i].sh_type == SHT_REL ? "Rel " : "RelA "));
438
439 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
440 if (shdr[i].sh_link == SHN_UNDEF)
441 errorBelch("\n%s: relocation section #%d has no symbol table\n"
442 "This object file has probably been fully stripped. "
443 "Such files cannot be linked.\n",
444 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
445 else
446 errorBelch("\n%s: relocation section #%d has an invalid link field (%d)\n",
447 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
448 i, shdr[i].sh_link);
449 return 0;
450 }
451 if (shdr[shdr[i].sh_link].sh_type != SHT_SYMTAB) {
452 errorBelch("\n%s: relocation section #%d does not link to a symbol table\n",
453 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
454 return 0;
455 }
456 if (!SECTION_INDEX_VALID(shdr[i].sh_info)) {
457 errorBelch("\n%s: relocation section #%d has an invalid info field (%d)\n",
458 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
459 i, shdr[i].sh_info);
460 return 0;
461 }
462
463 break;
464 case SHT_SYMTAB:
465 IF_DEBUG(linker,debugBelch("Sym "));
466
467 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
468 errorBelch("\n%s: symbol table section #%d has an invalid link field (%d)\n",
469 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
470 i, shdr[i].sh_link);
471 return 0;
472 }
473 if (shdr[shdr[i].sh_link].sh_type != SHT_STRTAB) {
474 errorBelch("\n%s: symbol table section #%d does not link to a string table\n",
475 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
476
477 return 0;
478 }
479 break;
480 case SHT_STRTAB: IF_DEBUG(linker,debugBelch("Str ")); break;
481 default: IF_DEBUG(linker,debugBelch(" ")); break;
482 }
483 if (sh_strtab) {
484 IF_DEBUG(linker,debugBelch("sname=%s\n", sh_strtab + shdr[i].sh_name ));
485 }
486 }
487
488 IF_DEBUG(linker,debugBelch( "\nString tables\n" ));
489 nstrtab = 0;
490 for (i = 0; i < shnum; i++) {
491 if (shdr[i].sh_type == SHT_STRTAB
492 /* Ignore the section header's string table. */
493 && i != shstrndx
494 /* Ignore string tables named .stabstr, as they contain
495 debugging info. */
496 && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
497 ) {
498 IF_DEBUG(linker,debugBelch(" section %d is a normal string table\n", i ));
499 nstrtab++;
500 }
501 }
502 if (nstrtab == 0) {
503 IF_DEBUG(linker,debugBelch(" no normal string tables (potentially, but not necessarily a problem)\n"));
504 }
505 #if defined(SHN_XINDEX)
506 Elf_Word* shndxTable = get_shndx_table(ehdr);
507 #endif
508 nsymtabs = 0;
509 IF_DEBUG(linker,debugBelch( "Symbol tables\n" ));
510 for (i = 0; i < shnum; i++) {
511 if (shdr[i].sh_type != SHT_SYMTAB) continue;
512 IF_DEBUG(linker,debugBelch( "section %d is a symbol table\n", i ));
513 nsymtabs++;
514 stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
515 nent = shdr[i].sh_size / sizeof(Elf_Sym);
516 IF_DEBUG(linker,debugBelch( " number of entries is apparently %d (%ld rem)\n",
517 nent,
518 (long)shdr[i].sh_size % sizeof(Elf_Sym)
519 ));
520 if (0 != shdr[i].sh_size % sizeof(Elf_Sym)) {
521 errorBelch("%s: non-integral number of symbol table entries", oc->fileName);
522 return 0;
523 }
524 for (j = 0; j < nent; j++) {
525 Elf_Word secno = stab[j].st_shndx;
526 #if defined(SHN_XINDEX)
527 /* See Note [Many ELF Sections] */
528 if (secno == SHN_XINDEX) {
529 ASSERT(shndxTable);
530 secno = shndxTable[j];
531 }
532 #endif
533 IF_DEBUG(linker,debugBelch(" %2d ", j ));
534 IF_DEBUG(linker,debugBelch(" sec=%-5d size=%-3d val=%5p ",
535 (int)secno,
536 (int)stab[j].st_size,
537 (char*)stab[j].st_value ));
538
539 IF_DEBUG(linker,debugBelch("type=" ));
540 switch (ELF_ST_TYPE(stab[j].st_info)) {
541 case STT_NOTYPE: IF_DEBUG(linker,debugBelch("notype " )); break;
542 case STT_OBJECT: IF_DEBUG(linker,debugBelch("object " )); break;
543 case STT_FUNC : IF_DEBUG(linker,debugBelch("func " )); break;
544 case STT_SECTION: IF_DEBUG(linker,debugBelch("section" )); break;
545 case STT_FILE: IF_DEBUG(linker,debugBelch("file " )); break;
546 default: IF_DEBUG(linker,debugBelch("? " )); break;
547 }
548 IF_DEBUG(linker,debugBelch(" " ));
549
550 IF_DEBUG(linker,debugBelch("bind=" ));
551 switch (ELF_ST_BIND(stab[j].st_info)) {
552 case STB_LOCAL : IF_DEBUG(linker,debugBelch("local " )); break;
553 case STB_GLOBAL: IF_DEBUG(linker,debugBelch("global" )); break;
554 case STB_WEAK : IF_DEBUG(linker,debugBelch("weak " )); break;
555 default: IF_DEBUG(linker,debugBelch("? " )); break;
556 }
557 IF_DEBUG(linker,debugBelch(" " ));
558
559 IF_DEBUG(linker,debugBelch("other=%2x ", stab[j].st_other ));
560 IF_DEBUG(linker,debugBelch("name=%s [%x]\n",
561 ehdrC + shdr[shdr[i].sh_link].sh_offset
562 + stab[j].st_name, stab[j].st_name ));
563 }
564 }
565
566 if (nsymtabs == 0) {
567 // Not having a symbol table is not in principle a problem.
568 // When an object file has no symbols then the 'strip' program
569 // typically will remove the symbol table entirely.
570 IF_DEBUG(linker,debugBelch(" no symbol tables (potentially, but not necessarily a problem)\n"));
571 }
572
573 return 1;
574 }
575
576 /* Figure out what kind of section it is. Logic derived from
577 Figure 1.14 ("Special Sections") of the ELF document
578 ("Portable Formats Specification, Version 1.1"). */
579 static int getSectionKind_ELF( Elf_Shdr *hdr, int *is_bss )
580 {
581 *is_bss = false;
582
583 if (hdr->sh_type == SHT_PROGBITS
584 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_EXECINSTR)) {
585 /* .text-style section */
586 return SECTIONKIND_CODE_OR_RODATA;
587 }
588
589 if (hdr->sh_type == SHT_PROGBITS
590 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
591 /* .data-style section */
592 return SECTIONKIND_RWDATA;
593 }
594
595 if (hdr->sh_type == SHT_PROGBITS
596 && (hdr->sh_flags & SHF_ALLOC) && !(hdr->sh_flags & SHF_WRITE)) {
597 /* .rodata-style section */
598 return SECTIONKIND_CODE_OR_RODATA;
599 }
600 #if defined(SHT_INIT_ARRAY)
601 if (hdr->sh_type == SHT_INIT_ARRAY
602 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
603 /* .init_array section */
604 return SECTIONKIND_INIT_ARRAY;
605 }
606 #endif /* not SHT_INIT_ARRAY */
607 if (hdr->sh_type == SHT_NOBITS
608 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
609 /* .bss-style section */
610 *is_bss = true;
611 return SECTIONKIND_RWDATA;
612 }
613
614 return SECTIONKIND_OTHER;
615 }
616
617 #if !defined(NEED_PLT)
618
619 static void *
620 mapObjectFileSection (int fd, Elf_Word offset, Elf_Word size,
621 void **mapped_start, StgWord *mapped_size,
622 StgWord *mapped_offset)
623 {
624 void *p;
625 size_t pageOffset, pageSize;
626
627 pageOffset = roundDownToPage(offset);
628 pageSize = roundUpToPage(offset-pageOffset+size);
629 p = mmapForLinker(pageSize, 0, fd, pageOffset);
630 if (p == NULL) return NULL;
631 *mapped_size = pageSize;
632 *mapped_offset = pageOffset;
633 *mapped_start = p;
634 return (void*)((StgWord)p + offset - pageOffset);
635 }
636 #endif
637
638 int
639 ocGetNames_ELF ( ObjectCode* oc )
640 {
641 Elf_Word i;
642 int result, fd = -1;
643
644 char* ehdrC = (char*)(oc->image);
645 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
646
647 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
648 Section * sections;
649 #if defined(SHN_XINDEX)
650 Elf_Word* shndxTable = get_shndx_table(ehdr);
651 #endif
652 const Elf_Word shnum = elf_shnum(ehdr);
653
654 ASSERT(symhash != NULL);
655
656 sections = (Section*)stgCallocBytes(sizeof(Section), shnum,
657 "ocGetNames_ELF(sections)");
658 oc->sections = sections;
659 oc->n_sections = shnum;
660
661 if (oc->imageMapped) {
662 #if defined(openbsd_HOST_OS)
663 fd = open(oc->fileName, O_RDONLY, S_IRUSR);
664 #else
665 fd = open(oc->fileName, O_RDONLY);
666 #endif
667 if (fd == -1) {
668 errorBelch("loadObj: can't open %" PATH_FMT, oc->fileName);
669 return 0;
670 }
671 }
672
673 for (i = 0; i < shnum; i++) {
674 int is_bss = false;
675 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
676 SectionAlloc alloc = SECTION_NOMEM;
677 void *start = NULL, *mapped_start = NULL;
678 StgWord mapped_size = 0, mapped_offset = 0;
679 StgWord size = shdr[i].sh_size;
680 StgWord offset = shdr[i].sh_offset;
681
682 if (is_bss && size > 0) {
683 /* This is a non-empty .bss section. Allocate zeroed space for
684 it, and set its .sh_offset field such that
685 ehdrC + .sh_offset == addr_of_zeroed_space. */
686 #if defined(NEED_GOT)
687 /* always use mmap if we use GOT slots. Otherwise the malloced
688 * address might be out of range for sections that are mmaped.
689 */
690 alloc = SECTION_MMAP;
691 start = mmap(NULL, size,
692 PROT_READ | PROT_WRITE | PROT_EXEC,
693 MAP_ANON | MAP_PRIVATE,
694 -1, 0);
695 mapped_start = start;
696 mapped_offset = 0;
697 mapped_size = roundUpToPage(size);
698 #else
699 alloc = SECTION_MALLOC;
700 start = stgCallocBytes(1, size, "ocGetNames_ELF(BSS)");
701 mapped_start = start;
702 #endif
703 /*
704 debugBelch("BSS section at 0x%x, size %d\n",
705 zspace, shdr[i].sh_size);
706 */
707 addSection(&sections[i], kind, alloc, start, size,
708 mapped_offset, mapped_start, mapped_size);
709
710 oc->sections[i].info->nstubs = 0;
711 oc->sections[i].info->stub_offset = NULL;
712 oc->sections[i].info->stub_size = 0;
713 oc->sections[i].info->stubs = NULL;
714 } else if (kind != SECTIONKIND_OTHER && size > 0) {
715
716 #if defined(NEED_PLT)
717 /* To support stubs next to sections, we will use the following
718 * layout:
719 *
720 * .--------------.
721 * | Section data |
722 * |--------------|
723 * | Stub space |
724 * '--------------'
725 *
726 * This ensures that the plt stubs are in range for the section data,
727 * Unless the section data exceeds the size for relative jump, in
728 * which case I wouldn't know how to solve this, without starting to
729 * break up the section itself.
730 */
731
732 unsigned nstubs = numberOfStubsForSection(oc, i);
733 unsigned stub_space = STUB_SIZE * nstubs;
734
735 void * mem = mmap(NULL, size+stub_space,
736 PROT_READ | PROT_WRITE | PROT_EXEC,
737 MAP_ANON | MAP_PRIVATE,
738 -1, 0);
739
740 if( mem == MAP_FAILED ) {
741 barf("failed to mmap allocated memory to load section %d. "
742 "errno = %d", i, errno);
743 }
744
745 /* copy only the image part over; we don't want to copy data
746 * into the stub part.
747 */
748 memcpy( mem, oc->image + offset, size );
749
750 alloc = SECTION_MMAP;
751
752 mapped_offset = 0;
753 mapped_size = roundUpToPage(size+stub_space);
754 start = mem;
755 mapped_start = mem;
756 #else
757 if (USE_CONTIGUOUS_MMAP) {
758 // already mapped.
759 start = oc->image + offset;
760 alloc = SECTION_NOMEM;
761 }
762 // use the m32 allocator if either the image is not mapped
763 // (i.e. we cannot map the secions separately), or if the section
764 // size is small.
765 else if (!oc->imageMapped || size < getPageSize() / 3) {
766 start = m32_alloc(size, 8);
767 if (start == NULL) goto fail;
768 memcpy(start, oc->image + offset, size);
769 alloc = SECTION_M32;
770 } else {
771 start = mapObjectFileSection(fd, offset, size,
772 &mapped_start, &mapped_size,
773 &mapped_offset);
774 if (start == NULL) goto fail;
775 alloc = SECTION_MMAP;
776 }
777 #endif
778 addSection(&sections[i], kind, alloc, start, size,
779 mapped_offset, mapped_start, mapped_size);
780
781 #if defined(NEED_PLT)
782 oc->sections[i].info->nstubs = 0;
783 oc->sections[i].info->stub_offset = (uint8_t*)mem + size;
784 oc->sections[i].info->stub_size = stub_space;
785 oc->sections[i].info->stubs = NULL;
786 #else
787 oc->sections[i].info->nstubs = 0;
788 oc->sections[i].info->stub_offset = NULL;
789 oc->sections[i].info->stub_size = 0;
790 oc->sections[i].info->stubs = NULL;
791 #endif
792
793 addProddableBlock(oc, start, size);
794 } else {
795 addSection(&oc->sections[i], kind, alloc, oc->image+offset, size,
796 0, 0, 0);
797 oc->sections[i].info->nstubs = 0;
798 oc->sections[i].info->stub_offset = NULL;
799 oc->sections[i].info->stub_size = 0;
800 oc->sections[i].info->stubs = NULL;
801 }
802 oc->sections[i].info->name = oc->info->sectionHeaderStrtab
803 + shdr[i].sh_name;
804 oc->sections[i].info->sectionHeader = &shdr[i];
805
806
807
808
809 if (shdr[i].sh_type != SHT_SYMTAB) continue;
810
811 /* copy stuff into this module's object symbol table */
812
813 oc->n_symbols = 0;
814 for(ElfSymbolTable *symTab = oc->info->symbolTables;
815 symTab != NULL; symTab = symTab->next) {
816 oc->n_symbols += symTab->n_symbols;
817 }
818
819 oc->symbols = stgCallocBytes(oc->n_symbols, sizeof(SymbolName*),
820 "ocGetNames_ELF(oc->symbols)");
821 // Note calloc: if we fail partway through initializing symbols, we need
822 // to undo the additions to the symbol table so far. We know which ones
823 // have been added by whether the entry is NULL or not.
824
825 unsigned curSymbol = 0;
826
827 //TODO: we ignore local symbols anyway right? So we can use the
828 // shdr[i].sh_info to get the index of the first non-local symbol
829 // ie we should use j = shdr[i].sh_info
830 for(ElfSymbolTable *symTab = oc->info->symbolTables;
831 symTab != NULL; symTab = symTab->next) {
832 for (size_t j = 0; j < symTab->n_symbols; j++) {
833
834 char isLocal = false; /* avoids uninit-var warning */
835 HsBool isWeak = HS_BOOL_FALSE;
836 SymbolName *nm = symTab->symbols[j].name;
837 unsigned short shndx = symTab->symbols[j].elf_sym->st_shndx;
838
839 ElfSymbol *symbol = &symTab->symbols[j];
840
841 Elf_Word secno;
842
843
844 /* See Note [Many ELF Sections] */
845 /* Note that future checks for special SHN_* numbers should check
846 * the shndx variable, not the section number in secno. Sections
847 * with the real number in the SHN_LORESERVE..HIRESERVE range
848 * will have shndx SHN_XINDEX and a secno with one of the
849 * reserved values. */
850 secno = shndx;
851 #if defined(SHN_XINDEX)
852 if (shndx == SHN_XINDEX) {
853 ASSERT(shndxTable);
854 secno = shndxTable[j];
855 }
856 #endif
857 /* Figure out if we want to add it; if so, set ad to its
858 address. Otherwise leave ad == NULL. */
859
860 if (shndx == SHN_COMMON) {
861 isLocal = false;
862 symbol->addr = stgCallocBytes(1, symbol->elf_sym->st_size,
863 "ocGetNames_ELF(COMMON)");
864 /*
865 debugBelch("COMMON symbol, size %d name %s\n",
866 stab[j].st_size, nm);
867 */
868 /* Pointless to do addProddableBlock() for this area,
869 since the linker should never poke around in it. */
870 } else if ((ELF_ST_BIND(symbol->elf_sym->st_info) == STB_GLOBAL
871 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL
872 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_WEAK
873 )
874 /* and not an undefined symbol */
875 && shndx != SHN_UNDEF
876 /* and not in a "special section" */
877 && (shndx < SHN_LORESERVE
878 #if defined(SHN_XINDEX)
879 || shndx == SHN_XINDEX
880 #endif
881 )
882 &&
883 /* and it's a not a section or string table or
884 * anything silly */
885 (ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC
886 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_OBJECT
887 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_NOTYPE
888 )
889 ) {
890 /* Section 0 is the undefined section, hence > and not >=. */
891 ASSERT(secno > 0 && secno < shnum);
892 /*
893 if (shdr[secno].sh_type == SHT_NOBITS) {
894 debugBelch(" BSS symbol, size %d off %d name %s\n",
895 stab[j].st_size, stab[j].st_value, nm);
896 }
897 */
898 symbol->addr = (SymbolAddr*)(
899 (intptr_t) oc->sections[secno].start +
900 (intptr_t) symbol->elf_sym->st_value);
901
902 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
903 isLocal = true;
904 isWeak = false;
905 } else { /* STB_GLOBAL or STB_WEAK */
906 IF_DEBUG(linker,
907 debugBelch("addOTabName(GLOB): %10p %s %s\n",
908 symbol->addr, oc->fileName, nm));
909 isLocal = false;
910 isWeak = ELF_ST_BIND(symbol->elf_sym->st_info)
911 == STB_WEAK;
912 }
913 }
914
915 /* And the decision is ... */
916
917 if (symbol->addr != NULL) {
918 ASSERT(nm != NULL);
919 /* Acquire! */
920 if (!isLocal) {
921
922 if (isWeak == HS_BOOL_TRUE) {
923 setWeakSymbol(oc, nm);
924 }
925 if (!ghciInsertSymbolTable(oc->fileName, symhash,
926 nm, symbol->addr, isWeak, oc)
927 ) {
928 goto fail;
929 }
930 oc->symbols[curSymbol++] = nm;
931 }
932 } else {
933 /* Skip. */
934 IF_DEBUG(linker,
935 debugBelch("skipping `%s'\n",
936 nm)
937 );
938
939 /*
940 debugBelch(
941 "skipping bind = %d, type = %d, secno = %d `%s'\n",
942 (int)ELF_ST_BIND(stab[j].st_info),
943 (int)ELF_ST_TYPE(stab[j].st_info),
944 (int)secno,
945 nm
946 );
947 */
948 }
949 }
950 }
951 }
952
953 #if defined(NEED_GOT)
954 if(makeGot( oc ))
955 errorBelch("Failed to create GOT for %s",
956 oc->archiveMemberName
957 ? oc->archiveMemberName
958 : oc->fileName);
959 #endif
960 result = 1;
961 goto end;
962
963 fail:
964 result = 0;
965 goto end;
966
967 end:
968 if (fd >= 0) close(fd);
969 return result;
970 }
971
972 // the aarch64 linker uses relocacteObjectCodeAarch64,
973 // see elf_reloc_aarch64.{h,c}
974 #if !defined(aarch64_HOST_ARCH)
975
976 /* Do ELF relocations which lack an explicit addend. All x86-linux
977 and arm-linux relocations appear to be of this form. */
978 static int
979 do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
980 Elf_Shdr* shdr, int shnum )
981 {
982 int j;
983
984 Elf_Word* targ;
985 Elf_Rel* rtab = (Elf_Rel*) (ehdrC + shdr[shnum].sh_offset);
986
987 int nent = shdr[shnum].sh_size / sizeof(Elf_Rel);
988 int target_shndx = shdr[shnum].sh_info;
989 int symtab_shndx = shdr[shnum].sh_link;
990
991 ElfSymbolTable *stab = NULL;
992 for(ElfSymbolTable * st = oc->info->symbolTables;
993 st != NULL; st = st->next) {
994 if((int)st->index == symtab_shndx) {
995 stab = st;
996 break;
997 }
998 }
999 ASSERT(stab != NULL);
1000
1001 targ = (Elf_Word*)oc->sections[target_shndx].start;
1002 IF_DEBUG(linker,debugBelch(
1003 "relocations for section %d using symtab %d\n",
1004 target_shndx, symtab_shndx));
1005
1006 /* Skip sections that we're not interested in. */
1007 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1008 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1009 return 1;
1010 }
1011
1012 for (j = 0; j < nent; j++) {
1013 Elf_Addr offset = rtab[j].r_offset;
1014 Elf_Addr info = rtab[j].r_info;
1015
1016 Elf_Addr P = ((Elf_Addr)targ) + offset;
1017 Elf_Word* pP = (Elf_Word*)P;
1018 #if defined(i386_HOST_ARCH) || defined(DEBUG)
1019 Elf_Addr A = *pP;
1020 #endif
1021 Elf_Addr S;
1022 void* S_tmp;
1023 #if defined(i386_HOST_ARCH)
1024 Elf_Addr value;
1025 #endif
1026 #if defined(arm_HOST_ARCH)
1027 int is_target_thm=0, T=0;
1028 #endif
1029
1030 ElfSymbol * symbol = NULL;
1031
1032 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p): ",
1033 j, (void*)offset, (void*)info ));
1034 if (!info) {
1035 IF_DEBUG(linker,debugBelch( " ZERO" ));
1036 S = 0;
1037 } else {
1038 symbol = &stab->symbols[ELF_R_SYM(info)];
1039 /* First see if it is a local symbol. */
1040 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
1041 S = (Elf_Addr)symbol->addr;
1042 } else {
1043 S_tmp = lookupSymbol_( symbol->name );
1044 S = (Elf_Addr)S_tmp;
1045 }
1046 if (!S) {
1047 errorBelch("%s: unknown symbol `%s'",
1048 oc->fileName, symbol->name);
1049 return 0;
1050 }
1051 IF_DEBUG(linker,debugBelch( "`%s' resolves to %p\n", symbol->name,
1052 (void*)S ));
1053
1054 #if defined(arm_HOST_ARCH)
1055 /*
1056 * 4.5.3 Symbol Values
1057 *
1058 * In addition to the normal rules for symbol values the following
1059 * rules shall also apply to symbols of type STT_FUNC:
1060 * - If the symbol addresses an ARM instruction, its value is the
1061 * address of the instruction (in a relocatable object, the
1062 * offset of the instruction from the start of the section
1063 * containing it).
1064 * - If the symbol addresses a Thumb instruction, its value is the
1065 * address of the instruction with bit zero set (in a relocatable
1066 * object, the section offset with bit zero set).
1067 * - For the purposes of relocation the value used shall be the
1068 * address of the instruction (st_value & ~1).
1069 *
1070 * Note: This allows a linker to distinguish ARM and Thumb code
1071 * symbols without having to refer to the map. An ARM symbol
1072 * will always have an even value, while a Thumb symbol will
1073 * always have an odd value. However, a linker should strip
1074 * the discriminating bit from the value before using it for
1075 * relocation.
1076 *
1077 * (source: ELF for the ARM Architecture
1078 * ARM IHI 0044F, current through ABI release 2.10
1079 * 24th November 2015)
1080 */
1081 if(ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC) {
1082 is_target_thm = S & 0x1;
1083 T = is_target_thm;
1084 S &= ~1;
1085 }
1086 #endif
1087 }
1088
1089 int reloc_type = ELF_R_TYPE(info);
1090 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p type=%d\n",
1091 (void*)P, (void*)S, (void*)A, reloc_type ));
1092 checkProddableBlock ( oc, pP, sizeof(Elf_Word) );
1093
1094 #if defined(i386_HOST_ARCH)
1095 value = S + A;
1096 #endif
1097
1098 switch (reloc_type) {
1099 # ifdef i386_HOST_ARCH
1100 case COMPAT_R_386_NONE: break;
1101 case COMPAT_R_386_32: *pP = value; break;
1102 case COMPAT_R_386_PC32: *pP = value - P; break;
1103 # endif
1104
1105 # ifdef arm_HOST_ARCH
1106 case COMPAT_R_ARM_ABS32:
1107 // Specified by Linux ARM ABI to be equivalent to ABS32
1108 case COMPAT_R_ARM_TARGET1:
1109 *(Elf32_Word *)P += S;
1110 *(Elf32_Word *)P |= T;
1111 break;
1112
1113 case COMPAT_R_ARM_REL32:
1114 *(Elf32_Word *)P += S;
1115 *(Elf32_Word *)P |= T;
1116 *(Elf32_Word *)P -= P;
1117 break;
1118
1119 case COMPAT_R_ARM_CALL:
1120 case COMPAT_R_ARM_JUMP24:
1121 {
1122 // N.B. LLVM's LLD linker's relocation implementation is a fantastic
1123 // resource
1124 StgWord32 *word = (StgWord32 *)P;
1125 StgInt32 imm = (*word & ((1<<24)-1)) << 2;
1126
1127 const StgBool is_blx = (*word & 0xf0000000) == 0xf0000000;
1128 const StgWord32 hBit = is_blx ? ((*word >> 24) & 1) : 0;
1129 imm |= hBit << 1;
1130
1131 // Sign extend to 32 bits
1132 // I would have thought this would be 24 bits but LLD uses 26 here.
1133 // Hmm.
1134 int32_t A = signExtend32(26, imm);
1135
1136 S = S + A; A = 0;
1137
1138 StgWord32 result = ((S + A) | T) - P;
1139
1140 const StgBool overflow = !isInt(26, (StgInt32) result);
1141 // Handle overflow and Thumb interworking
1142 const StgBool needs_veneer =
1143 (is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_JUMP24)
1144 || overflow;
1145
1146 if(needs_veneer) { /* overflow or thum interworking */
1147 // Note [PC bias]
1148 // From the ELF for the ARM Architecture documentation:
1149 // > 4.6.1.1 Addends and PC-bias compensation
1150 // > A binary file may use REL or RELA relocations or a mixture
1151 // > of the two (but multiple relocations for the same address
1152 // > must use only one type).
1153 // > If the relocation is pc-relative then compensation for the
1154 // > PC bias (the PC value is 8 bytes ahead of the executing
1155 // > instruction in ARM state and 4 bytes in Thumb state) must
1156 // > be encoded in the relocation by the object producer.
1157 int32_t bias = 8;
1158
1159 S += bias;
1160 /* try to locate an existing stub for this target */
1161 if(findStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1162 /* didn't find any. Need to create one */
1163 if(makeStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1164 errorBelch("Unable to create veneer for ARM_CALL\n");
1165 return 0;
1166 }
1167 }
1168 S -= bias;
1169
1170 result = ((S + A) | T) - P;
1171 result &= ~1; // Clear thumb indicator bit
1172
1173 ASSERT(isInt(26, result)); /* X in range */
1174 }
1175
1176 // Update the branch target
1177 const StgWord32 imm24 = (result & 0x03fffffc) >> 2;
1178 *word = (*word & ~0x00ffffff)
1179 | (imm24 & 0x00ffffff);
1180
1181 // Change the relocated branch into a BLX if necessary
1182 const StgBool switch_mode =
1183 is_target_thm && (reloc_type == COMPAT_R_ARM_CALL);
1184 if (!needs_veneer && switch_mode) {
1185 const StgWord32 hBit = (result & 0x2) >> 1;
1186 // Change instruction to BLX
1187 *word = (*word & ~0xFF000000) | ((0xfa | hBit) << 24);
1188 IF_DEBUG(linker, debugBelch("Changed BL to BLX at %p\n", word));
1189 }
1190 break;
1191 }
1192
1193 case COMPAT_R_ARM_MOVT_ABS:
1194 case COMPAT_R_ARM_MOVW_ABS_NC:
1195 {
1196 StgWord32 *word = (StgWord32 *)P;
1197 StgWord32 imm12 = *word & 0xfff;
1198 StgWord32 imm4 = (*word >> 16) & 0xf;
1199 StgInt32 offset = imm4 << 12 | imm12;
1200 StgWord32 result = (S + offset) | T;
1201
1202 if (reloc_type == COMPAT_R_ARM_MOVT_ABS)
1203 result = (result & 0xffff0000) >> 16;
1204
1205 StgWord32 result12 = result & 0xfff;
1206 StgWord32 result4 = (result >> 12) & 0xf;
1207 *word = (*word & ~0xf0fff) | (result4 << 16) | result12;
1208 break;
1209 }
1210
1211 case COMPAT_R_ARM_THM_CALL:
1212 case COMPAT_R_ARM_THM_JUMP24:
1213 {
1214 StgWord16 *upper = (StgWord16 *)P;
1215 StgWord16 *lower = (StgWord16 *)(P + 2);
1216
1217 int overflow;
1218 int to_thm = (*lower >> 12) & 1;
1219 int sign = (*upper >> 10) & 1;
1220 int j1, j2, i1, i2;
1221
1222 // Decode immediate value
1223 j1 = (*lower >> 13) & 1; i1 = ~(j1 ^ sign) & 1;
1224 j2 = (*lower >> 11) & 1; i2 = ~(j2 ^ sign) & 1;
1225
1226 StgInt32 A = (sign << 24)
1227 | (i1 << 23)
1228 | (i2 << 22)
1229 | ((*upper & 0x03ff) << 12)
1230 | ((*lower & 0x07ff) << 1);
1231
1232 // Sign extend 25 to 32 bits
1233 if (A & 0x01000000)
1234 A -= 0x02000000;
1235
1236 S = S + A; A = 0;
1237
1238 offset = ((S + A) | T) - P;
1239 overflow = offset <= (StgWord32)0xff000000
1240 || offset >= (StgWord32)0x01000000;
1241
1242 if ((!is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_JUMP24)
1243 || overflow) {
1244 // Generate veneer
1245
1246 // see [PC bias] above.
1247 int32_t bias = 4;
1248 S += bias;
1249 // set the Thumb indicator to S, the final address should
1250 // carry the correct thumb indicator.
1251 S |= T;
1252 /* try to locate an existing stub for this target */
1253 if(findStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1254 /* didn't find any. Need to create one */
1255 if(makeStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1256 errorBelch("Unable to create veneer for ARM_THM_CALL\n");
1257 return 0;
1258 }
1259 }
1260 S -= bias;
1261
1262 offset = ((S + A) | T) - P;
1263
1264 sign = offset >> 31;
1265 to_thm = 1;
1266 } else if (!is_target_thm
1267 && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_CALL) {
1268 offset &= ~0x3;
1269 to_thm = 0;
1270 }
1271
1272 // Reencode instruction
1273 i1 = ~(offset >> 23) & 1; j1 = sign ^ i1;
1274 i2 = ~(offset >> 22) & 1; j2 = sign ^ i2;
1275 *upper = ( (*upper & 0xf800)
1276 | (sign << 10)
1277 | ((offset >> 12) & 0x03ff) );
1278 *lower = ( (*lower & 0xd000)
1279 | (j1 << 13)
1280 | (to_thm << 12)
1281 | (j2 << 11)
1282 | ((offset >> 1) & 0x07ff) );
1283 break;
1284 }
1285
1286 case COMPAT_R_ARM_THM_MOVT_ABS:
1287 case COMPAT_R_ARM_THM_MOVW_ABS_NC:
1288 {
1289 StgWord16 *upper = (StgWord16 *)P;
1290 StgWord16 *lower = (StgWord16 *)(P + 2);
1291 StgInt32 offset = ((*upper & 0x000f) << 12)
1292 | ((*upper & 0x0400) << 1)
1293 | ((*lower & 0x7000) >> 4)
1294 | (*lower & 0x00ff);
1295
1296 offset = (offset ^ 0x8000) - 0x8000; // Sign extend
1297 offset += S;
1298 if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVW_ABS_NC)
1299 offset |= T;
1300 else if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVT_ABS)
1301 offset >>= 16;
1302
1303 *upper = ( (*upper & 0xfbf0)
1304 | ((offset & 0xf000) >> 12)
1305 | ((offset & 0x0800) >> 1) );
1306 *lower = ( (*lower & 0x8f00)
1307 | ((offset & 0x0700) << 4)
1308 | (offset & 0x00ff) );
1309 break;
1310 }
1311
1312 case COMPAT_R_ARM_THM_JUMP8:
1313 {
1314 StgWord16 *word = (StgWord16 *)P;
1315 StgWord offset = *word & 0x01fe;
1316 offset += S - P;
1317 if (!is_target_thm) {
1318 errorBelch("%s: Thumb to ARM transition with JUMP8 relocation "
1319 "not supported\n",
1320 oc->fileName);
1321 return 0;
1322 }
1323
1324 *word = (*word & ~0x01fe)
1325 | (offset & 0x01fe);
1326 break;
1327 }
1328
1329 case COMPAT_R_ARM_THM_JUMP11:
1330 {
1331 StgWord16 *word = (StgWord16 *)P;
1332 StgWord offset = *word & 0x0ffe;
1333 offset += S - P;
1334 if (!is_target_thm) {
1335 errorBelch("%s: Thumb to ARM transition with JUMP11 relocation "
1336 "not supported\n",
1337 oc->fileName);
1338 return 0;
1339 }
1340
1341 *word = (*word & ~0x0ffe)
1342 | (offset & 0x0ffe);
1343 break;
1344 }
1345 case COMPAT_R_ARM_GOT_PREL: {
1346 int32_t A = *pP;
1347 void* GOT_S = symbol->got_addr;
1348 ASSERT(GOT_S);
1349 *(uint32_t *)P = (uint32_t) GOT_S + A - P;
1350 break;
1351 }
1352 # endif // arm_HOST_ARCH
1353
1354 default:
1355 errorBelch("%s: unhandled ELF relocation(Rel) type %" FMT_Word "\n",
1356 oc->fileName, (W_)ELF_R_TYPE(info));
1357 return 0;
1358 }
1359
1360 }
1361 return 1;
1362 }
1363
1364 /* Do ELF relocations for which explicit addends are supplied.
1365 sparc-solaris relocations appear to be of this form. */
1366 static int
1367 do_Elf_Rela_relocations ( ObjectCode* oc, char* ehdrC,
1368 Elf_Shdr* shdr, int shnum )
1369 {
1370 int j;
1371 SymbolName* symbol = NULL;
1372 Elf_Rela* rtab = (Elf_Rela*) (ehdrC + shdr[shnum].sh_offset);
1373 Elf_Sym* stab;
1374 char* strtab;
1375 int nent = shdr[shnum].sh_size / sizeof(Elf_Rela);
1376 int symtab_shndx = shdr[shnum].sh_link;
1377 int strtab_shndx = shdr[symtab_shndx].sh_link;
1378 int target_shndx = shdr[shnum].sh_info;
1379 #if defined(SHN_XINDEX)
1380 Elf_Word* shndx_table = get_shndx_table((Elf_Ehdr*)ehdrC);
1381 #endif
1382 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1383 || defined(x86_64_HOST_ARCH)
1384 /* This #if def only serves to avoid unused-var warnings. */
1385 Elf_Addr targ = (Elf_Addr) oc->sections[target_shndx].start;
1386 #endif
1387
1388 stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
1389 strtab= (char*) (ehdrC + shdr[ strtab_shndx ].sh_offset);
1390
1391 IF_DEBUG(linker,debugBelch( "relocations for section %d using symtab %d\n",
1392 target_shndx, symtab_shndx ));
1393
1394 /* Skip sections that we're not interested in. */
1395 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1396 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1397 return 1;
1398 }
1399
1400 for (j = 0; j < nent; j++) {
1401 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1402 || defined(x86_64_HOST_ARCH)
1403 /* This #if def only serves to avoid unused-var warnings. */
1404 Elf_Addr offset = rtab[j].r_offset;
1405 Elf_Addr P = targ + offset;
1406 Elf_Addr A = rtab[j].r_addend;
1407 #endif
1408 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1409 || defined(x86_64_HOST_ARCH)
1410 Elf_Addr value;
1411 #endif
1412 Elf_Addr info = rtab[j].r_info;
1413 Elf_Addr S;
1414 void* S_tmp;
1415 # if defined(sparc_HOST_ARCH)
1416 Elf_Word* pP = (Elf_Word*)P;
1417 Elf_Word w1, w2;
1418 # elif defined(powerpc_HOST_ARCH)
1419 Elf_Sword delta;
1420 # endif
1421
1422 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p %6p) ",
1423 j, (void*)offset, (void*)info,
1424 (void*)A ));
1425 if (!info) {
1426 IF_DEBUG(linker,debugBelch( " ZERO" ));
1427 S = 0;
1428 } else {
1429 Elf_Sym sym = stab[ELF_R_SYM(info)];
1430 /* First see if it is a local symbol. */
1431 if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
1432 /* Yes, so we can get the address directly from the ELF symbol
1433 table. */
1434 symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
1435 /* See Note [Many ELF Sections] */
1436 Elf_Word secno = sym.st_shndx;
1437 #if defined(SHN_XINDEX)
1438 if (secno == SHN_XINDEX) {
1439 secno = shndx_table[ELF_R_SYM(info)];
1440 }
1441 #endif
1442 S = (Elf_Addr)oc->sections[secno].start
1443 + stab[ELF_R_SYM(info)].st_value;
1444 } else {
1445 /* No, so look up the name in our global table. */
1446 symbol = strtab + sym.st_name;
1447 S_tmp = lookupSymbol_( symbol );
1448 S = (Elf_Addr)S_tmp;
1449 }
1450 if (!S) {
1451 errorBelch("%s: unknown symbol `%s'", oc->fileName, symbol);
1452 return 0;
1453 }
1454 IF_DEBUG(linker,debugBelch("`%s' resolves to %p\n", symbol, (void*)S));
1455 }
1456
1457 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1458 || defined(x86_64_HOST_ARCH)
1459 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p\n",
1460 (void*)P, (void*)S, (void*)A ));
1461 checkProddableBlock(oc, (void*)P, sizeof(Elf_Word));
1462 #endif
1463
1464 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1465 || defined(x86_64_HOST_ARCH)
1466 value = S + A;
1467 #endif
1468
1469 switch (ELF_R_TYPE(info)) {
1470 # if defined(sparc_HOST_ARCH)
1471 case R_SPARC_WDISP30:
1472 w1 = *pP & 0xC0000000;
1473 w2 = (Elf_Word)((value - P) >> 2);
1474 ASSERT((w2 & 0xC0000000) == 0);
1475 w1 |= w2;
1476 *pP = w1;
1477 break;
1478 case R_SPARC_HI22:
1479 w1 = *pP & 0xFFC00000;
1480 w2 = (Elf_Word)(value >> 10);
1481 ASSERT((w2 & 0xFFC00000) == 0);
1482 w1 |= w2;
1483 *pP = w1;
1484 break;
1485 case R_SPARC_LO10:
1486 w1 = *pP & ~0x3FF;
1487 w2 = (Elf_Word)(value & 0x3FF);
1488 ASSERT((w2 & ~0x3FF) == 0);
1489 w1 |= w2;
1490 *pP = w1;
1491 break;
1492
1493 /* According to the Sun documentation:
1494 R_SPARC_UA32
1495 This relocation type resembles R_SPARC_32, except it refers to an
1496 unaligned word. That is, the word to be relocated must be treated
1497 as four separate bytes with arbitrary alignment, not as a word
1498 aligned according to the architecture requirements.
1499 */
1500 case R_SPARC_UA32:
1501 w2 = (Elf_Word)value;
1502
1503 // SPARC doesn't do misaligned writes of 32 bit words,
1504 // so we have to do this one byte-at-a-time.
1505 char *pPc = (char*)pP;
1506 pPc[0] = (char) ((Elf_Word)(w2 & 0xff000000) >> 24);
1507 pPc[1] = (char) ((Elf_Word)(w2 & 0x00ff0000) >> 16);
1508 pPc[2] = (char) ((Elf_Word)(w2 & 0x0000ff00) >> 8);
1509 pPc[3] = (char) ((Elf_Word)(w2 & 0x000000ff));
1510 break;
1511
1512 case R_SPARC_32:
1513 w2 = (Elf_Word)value;
1514 *pP = w2;
1515 break;
1516 # elif defined(powerpc_HOST_ARCH)
1517 case R_PPC_ADDR16_LO:
1518 *(Elf32_Half*) P = value;
1519 break;
1520
1521 case R_PPC_ADDR16_HI:
1522 *(Elf32_Half*) P = value >> 16;
1523 break;
1524
1525 case R_PPC_ADDR16_HA:
1526 *(Elf32_Half*) P = (value + 0x8000) >> 16;
1527 break;
1528
1529 case R_PPC_ADDR32:
1530 *(Elf32_Word *) P = value;
1531 break;
1532
1533 case R_PPC_REL32:
1534 *(Elf32_Word *) P = value - P;
1535 break;
1536
1537 case R_PPC_PLTREL24:
1538 value -= 0x8000; /* See Note [.LCTOC1 in PPC PIC code] */
1539 /* fallthrough */
1540 case R_PPC_REL24:
1541 delta = value - P;
1542
1543 if( delta << 6 >> 6 != delta )
1544 {
1545 value = (Elf_Addr)(&makeSymbolExtra( oc, ELF_R_SYM(info), value )
1546 ->jumpIsland);
1547 delta = value - P;
1548
1549 if( value == 0 || delta << 6 >> 6 != delta )
1550 {
1551 barf( "Unable to make SymbolExtra for #%d",
1552 ELF_R_SYM(info) );
1553 return 0;
1554 }
1555 }
1556
1557 *(Elf_Word *) P = (*(Elf_Word *) P & 0xfc000003)
1558 | (delta & 0x3fffffc);
1559 break;
1560
1561 case R_PPC_REL16_LO:
1562 *(Elf32_Half*) P = value - P;
1563 break;
1564
1565 case R_PPC_REL16_HI:
1566 *(Elf32_Half*) P = (value - P) >> 16;
1567 break;
1568
1569 case R_PPC_REL16_HA:
1570 *(Elf32_Half*) P = (value + 0x8000 - P) >> 16;
1571 break;
1572 # endif
1573
1574 #if defined(x86_64_HOST_ARCH)
1575 case COMPAT_R_X86_64_NONE:
1576 break;
1577
1578 case COMPAT_R_X86_64_64:
1579 {
1580 Elf64_Xword payload = value;
1581 memcpy((void*)P, &payload, sizeof(payload));
1582 break;
1583 }
1584
1585 case COMPAT_R_X86_64_PC32:
1586 {
1587 #if defined(ALWAYS_PIC)
1588 barf("R_X86_64_PC32 relocation, but ALWAYS_PIC.");
1589 #else
1590 StgInt64 off = value - P;
1591 if (off != (Elf64_Sword)off && X86_64_ELF_NONPIC_HACK) {
1592 StgInt64 pltAddress =
1593 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1594 -> jumpIsland;
1595 off = pltAddress + A - P;
1596 }
1597 if (off != (Elf64_Sword)off) {
1598 errorBelch(
1599 "R_X86_64_PC32 relocation out of range: %s = %" PRIx64
1600 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1601 symbol, off, oc->fileName);
1602 return 0;
1603 }
1604 Elf64_Sword payload = off;
1605 memcpy((void*)P, &payload, sizeof(payload));
1606 #endif
1607 break;
1608 }
1609
1610 case COMPAT_R_X86_64_PC64:
1611 {
1612 Elf64_Sxword payload = value - P;
1613 memcpy((void*)P, &payload, sizeof(payload));
1614 break;
1615 }
1616
1617 case COMPAT_R_X86_64_32:
1618 {
1619 #if defined(ALWAYS_PIC)
1620 barf("R_X86_64_32 relocation, but ALWAYS_PIC.");
1621 #else
1622 if (value != (Elf64_Word)value && X86_64_ELF_NONPIC_HACK) {
1623 StgInt64 pltAddress =
1624 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1625 -> jumpIsland;
1626 value = pltAddress + A;
1627 }
1628 if (value != (Elf64_Word)value) {
1629 errorBelch(
1630 "R_X86_64_32 relocation out of range: %s = %" PRIx64
1631 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1632 symbol, value, oc->fileName);
1633 return 0;
1634 }
1635 Elf64_Word payload = value;
1636 memcpy((void*)P, &payload, sizeof(payload));
1637 #endif
1638 break;
1639 }
1640
1641 case COMPAT_R_X86_64_32S:
1642 {
1643 #if defined(ALWAYS_PIC)
1644 barf("R_X86_64_32S relocation, but ALWAYS_PIC.");
1645 #else
1646 if ((StgInt64)value != (Elf64_Sword)value && X86_64_ELF_NONPIC_HACK) {
1647 StgInt64 pltAddress =
1648 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1649 -> jumpIsland;
1650 value = pltAddress + A;
1651 }
1652 if ((StgInt64)value != (Elf64_Sword)value) {
1653 errorBelch(
1654 "R_X86_64_32S relocation out of range: %s = %" PRIx64
1655 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1656 symbol, value, oc->fileName);
1657 return 0;
1658 }
1659 Elf64_Sword payload = value;
1660 memcpy((void*)P, &payload, sizeof(payload));
1661 #endif
1662 break;
1663 }
1664 case COMPAT_R_X86_64_REX_GOTPCRELX:
1665 case COMPAT_R_X86_64_GOTPCRELX:
1666 case COMPAT_R_X86_64_GOTPCREL:
1667 {
1668 StgInt64 gotAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)->addr;
1669 StgInt64 off = gotAddress + A - P;
1670 if (off != (Elf64_Sword)off) {
1671 barf(
1672 "COMPAT_R_X86_64_GOTPCREL relocation out of range: "
1673 "%s = %" PRIx64 " in %s.",
1674 symbol, off, oc->fileName);
1675 }
1676 Elf64_Sword payload = off;
1677 memcpy((void*)P, &payload, sizeof(payload));
1678 break;
1679 }
1680 #if defined(dragonfly_HOST_OS)
1681 case COMPAT_R_X86_64_GOTTPOFF:
1682 {
1683 #if defined(ALWAYS_PIC)
1684 barf("R_X86_64_GOTTPOFF relocation, but ALWAYS_PIC.");
1685 #else
1686 /* determine the offset of S to the current thread's tls
1687 area
1688 XXX: Move this to the beginning of function */
1689 struct tls_info ti;
1690 get_tls_area(0, &ti, sizeof(ti));
1691 /* make entry in GOT that contains said offset */
1692 StgInt64 gotEntry = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info),
1693 (S - (Elf64_Addr)(ti.base)))->addr;
1694 StgInt64 off = gotEntry + A - P;
1695 if (off != (Elf64_Sword)off) {
1696 barf(
1697 "COMPAT_R_X86_64_GOTTPOFF relocation out of range: "
1698 "%s = %" PRIx64 " in %s.",
1699 symbol, off, oc->fileName);
1700 }
1701 Elf64_SWord payload = off;
1702 memcpy((void*)P, &payload, sizeof(payload));
1703 #endif
1704 break;
1705 }
1706 #endif
1707
1708 case COMPAT_R_X86_64_PLT32:
1709 {
1710 #if defined(ALWAYS_PIC)
1711 barf("R_X86_64_PLT32 relocation, but ALWAYS_PIC.");
1712 #else
1713 StgInt64 off = value - P;
1714 if (off != (Elf64_Sword)off) {
1715 StgInt64 pltAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1716 -> jumpIsland;
1717 off = pltAddress + A - P;
1718 }
1719 if (off != (Elf64_Sword)off) {
1720 barf(
1721 "R_X86_64_PLT32 relocation out of range: "
1722 "%s = %" PRIx64 " in %s.",
1723 symbol, off, oc->fileName);
1724 }
1725 Elf64_Sword payload = off;
1726 memcpy((void*)P, &payload, sizeof(payload));
1727 #endif
1728 break;
1729 }
1730 #endif
1731
1732 default:
1733 barf("%s: unhandled ELF relocation(RelA) type %" FMT_Word "\n",
1734 oc->fileName, (W_)ELF_R_TYPE(info));
1735 return 0;
1736 }
1737
1738 }
1739 return 1;
1740 }
1741 #endif /* !aarch64_HOST_ARCH */
1742
1743
1744 int
1745 ocResolve_ELF ( ObjectCode* oc )
1746 {
1747 char* ehdrC = (char*)(oc->image);
1748 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1749 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1750 const Elf_Word shnum = elf_shnum(ehdr);
1751
1752 #if defined(SHN_XINDEX)
1753 Elf_Word* shndxTable = get_shndx_table(ehdr);
1754 #endif
1755
1756 /* resolve section symbols
1757 * these are special symbols that point to sections, and have no name.
1758 * Usually there should be one symbol for each text and data section.
1759 *
1760 * We need to resolve (assign addresses) to them, to be able to use them
1761 * during relocation.
1762 */
1763 for(ElfSymbolTable *symTab = oc->info->symbolTables;
1764 symTab != NULL; symTab = symTab->next) {
1765 for (size_t i = 0; i < symTab->n_symbols; i++) {
1766 ElfSymbol *symbol = &symTab->symbols[i];
1767 if(STT_SECTION == ELF_ST_TYPE(symbol->elf_sym->st_info)) {
1768 /* NOTE: We assume that oc->sections corresponds to the
1769 * sections in the object file. This is currently true,
1770 * and will stay true, unless we start to compress
1771 * oc->sections by not having an entry for sections we
1772 * are not interested in.
1773 */
1774
1775
1776 /* See Note [Many ELF Sections] */
1777 /* Note that future checks for special SHN_* numbers should
1778 * check the shndx variable, not the section number in secno.
1779 * Sections with the real number in the SHN_LORESERVE..HIRESERVE
1780 * range will have shndx SHN_XINDEX and a secno with one of the
1781 * reserved values.
1782 */
1783 Elf_Word secno = symbol->elf_sym->st_shndx;
1784 #if defined(SHN_XINDEX)
1785 if (secno == SHN_XINDEX) {
1786 ASSERT(shndxTable);
1787 secno = shndxTable[i];
1788 }
1789 #endif
1790 ASSERT(symbol->elf_sym->st_name == 0);
1791 ASSERT(symbol->elf_sym->st_value == 0);
1792 symbol->addr = oc->sections[ secno ].start;
1793 }
1794 }
1795 }
1796
1797 #if defined(NEED_GOT)
1798 if(fillGot( oc ))
1799 return 0;
1800 /* silence warnings */
1801 (void) shnum;
1802 (void) shdr;
1803 #endif /* NEED_GOT */
1804
1805 #if defined(aarch64_HOST_ARCH)
1806 /* use new relocation design */
1807 if(relocateObjectCode( oc ))
1808 return 0;
1809 #else
1810 /* Process the relocation sections. */
1811 for (Elf_Word i = 0; i < shnum; i++) {
1812 if (shdr[i].sh_type == SHT_REL) {
1813 bool ok = do_Elf_Rel_relocations ( oc, ehdrC, shdr, i );
1814 if (!ok)
1815 return ok;
1816 }
1817 else
1818 if (shdr[i].sh_type == SHT_RELA) {
1819 bool ok = do_Elf_Rela_relocations ( oc, ehdrC, shdr, i );
1820 if (!ok)
1821 return ok;
1822 }
1823 }
1824 #endif
1825
1826 #if defined(powerpc_HOST_ARCH)
1827 ocFlushInstructionCache( oc );
1828 #endif
1829
1830 return 1;
1831 }
1832
1833 int ocRunInit_ELF( ObjectCode *oc )
1834 {
1835 Elf_Word i;
1836 char* ehdrC = (char*)(oc->image);
1837 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1838 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1839 char* sh_strtab = ehdrC + shdr[elf_shstrndx(ehdr)].sh_offset;
1840 int argc, envc;
1841 char **argv, **envv;
1842
1843 getProgArgv(&argc, &argv);
1844 getProgEnvv(&envc, &envv);
1845
1846 // XXX Apparently in some archs .init may be something
1847 // special! See DL_DT_INIT_ADDRESS macro in glibc
1848 // as well as ELF_FUNCTION_PTR_IS_SPECIAL. We've not handled
1849 // it here, please file a bug report if it affects you.
1850 for (i = 0; i < elf_shnum(ehdr); i++) {
1851 init_t *init_start, *init_end, *init;
1852 int is_bss = false;
1853 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
1854 if (kind == SECTIONKIND_CODE_OR_RODATA
1855 && 0 == memcmp(".init", sh_strtab + shdr[i].sh_name, 5)) {
1856 init_t init_f = (init_t)(oc->sections[i].start);
1857 init_f(argc, argv, envv);
1858 }
1859
1860 if (kind == SECTIONKIND_INIT_ARRAY) {
1861 char *init_startC = oc->sections[i].start;
1862 init_start = (init_t*)init_startC;
1863 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1864 for (init = init_start; init < init_end; init++) {
1865 (*init)(argc, argv, envv);
1866 }
1867 }
1868
1869 // XXX could be more strict and assert that it's
1870 // SECTIONKIND_RWDATA; but allowing RODATA seems harmless enough.
1871 if ((kind == SECTIONKIND_RWDATA || kind == SECTIONKIND_CODE_OR_RODATA)
1872 && 0 == memcmp(".ctors", sh_strtab + shdr[i].sh_name, 6)) {
1873 char *init_startC = oc->sections[i].start;
1874 init_start = (init_t*)init_startC;
1875 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1876 // ctors run in reverse
1877 for (init = init_end - 1; init >= init_start; init--) {
1878 (*init)(argc, argv, envv);
1879 }
1880 }
1881 }
1882
1883 freeProgEnvv(envc, envv);
1884 return 1;
1885 }
1886
1887 /*
1888 * PowerPC & X86_64 ELF specifics
1889 */
1890
1891 #if defined(NEED_SYMBOL_EXTRAS)
1892
1893 int ocAllocateSymbolExtras_ELF( ObjectCode *oc )
1894 {
1895 Elf_Ehdr *ehdr;
1896 Elf_Shdr* shdr;
1897 Elf_Word i, shnum;
1898
1899 ehdr = (Elf_Ehdr *) oc->image;
1900 shdr = (Elf_Shdr *) ( ((char *)oc->image) + ehdr->e_shoff );
1901
1902 shnum = elf_shnum(ehdr);
1903
1904 for( i = 0; i < shnum; i++ )
1905 if( shdr[i].sh_type == SHT_SYMTAB )
1906 break;
1907
1908 if( i == shnum )
1909 {
1910 // Not having a symbol table is not in principle a problem.
1911 // When an object file has no symbols then the 'strip' program
1912 // typically will remove the symbol table entirely.
1913 IF_DEBUG(linker, debugBelch( "The ELF file %s contains no symtab\n",
1914 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName ));
1915 return 1;
1916 }
1917
1918 if( shdr[i].sh_entsize != sizeof( Elf_Sym ) )
1919 {
1920 errorBelch( "The entry size (%d) of the symtab isn't %d\n",
1921 (int) shdr[i].sh_entsize, (int) sizeof( Elf_Sym ) );
1922
1923 return 0;
1924 }
1925
1926 return ocAllocateSymbolExtras( oc, shdr[i].sh_size / sizeof( Elf_Sym ), 0 );
1927 }
1928
1929 #endif /* NEED_SYMBOL_EXTRAS */
1930
1931 #endif /* elf */