Enable new warning for fragile/incorrect CPP #if usage
[ghc.git] / includes / CodeGen.Platform.hs
1
2 import CmmExpr
3 #if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
4 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc))
5 import Panic
6 #endif
7 import Reg
8
9 #include "ghcautoconf.h"
10 #include "stg/MachRegs.h"
11
12 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
13
14 # if defined(MACHREGS_i386)
15 # define eax 0
16 # define ebx 1
17 # define ecx 2
18 # define edx 3
19 # define esi 4
20 # define edi 5
21 # define ebp 6
22 # define esp 7
23 # endif
24
25 # if defined(MACHREGS_x86_64)
26 # define rax 0
27 # define rbx 1
28 # define rcx 2
29 # define rdx 3
30 # define rsi 4
31 # define rdi 5
32 # define rbp 6
33 # define rsp 7
34 # define r8 8
35 # define r9 9
36 # define r10 10
37 # define r11 11
38 # define r12 12
39 # define r13 13
40 # define r14 14
41 # define r15 15
42 # endif
43
44 # define fake0 16
45 # define fake1 17
46 # define fake2 18
47 # define fake3 19
48 # define fake4 20
49 # define fake5 21
50
51 # define xmm0 24
52 # define xmm1 25
53 # define xmm2 26
54 # define xmm3 27
55 # define xmm4 28
56 # define xmm5 29
57 # define xmm6 30
58 # define xmm7 31
59 # define xmm8 32
60 # define xmm9 33
61 # define xmm10 34
62 # define xmm11 35
63 # define xmm12 36
64 # define xmm13 37
65 # define xmm14 38
66 # define xmm15 39
67
68 # define ymm0 40
69 # define ymm1 41
70 # define ymm2 42
71 # define ymm3 43
72 # define ymm4 44
73 # define ymm5 45
74 # define ymm6 46
75 # define ymm7 47
76 # define ymm8 48
77 # define ymm9 49
78 # define ymm10 50
79 # define ymm11 51
80 # define ymm12 52
81 # define ymm13 53
82 # define ymm14 54
83 # define ymm15 55
84
85 # define zmm0 56
86 # define zmm1 57
87 # define zmm2 58
88 # define zmm3 59
89 # define zmm4 60
90 # define zmm5 61
91 # define zmm6 62
92 # define zmm7 63
93 # define zmm8 64
94 # define zmm9 65
95 # define zmm10 66
96 # define zmm11 67
97 # define zmm12 68
98 # define zmm13 69
99 # define zmm14 70
100 # define zmm15 71
101
102 -- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs.
103 -- Since it's only used to check 'isJust', the actual values don't matter, thus
104 -- I'm not sure if these are the correct numberings.
105 -- Normally, the register names are just stringified as part of the REG() macro
106
107 #elif defined(MACHREGS_powerpc) || defined(MACHREGS_arm) \
108 || defined(MACHREGS_aarch64)
109
110 # define r0 0
111 # define r1 1
112 # define r2 2
113 # define r3 3
114 # define r4 4
115 # define r5 5
116 # define r6 6
117 # define r7 7
118 # define r8 8
119 # define r9 9
120 # define r10 10
121 # define r11 11
122 # define r12 12
123 # define r13 13
124 # define r14 14
125 # define r15 15
126 # define r16 16
127 # define r17 17
128 # define r18 18
129 # define r19 19
130 # define r20 20
131 # define r21 21
132 # define r22 22
133 # define r23 23
134 # define r24 24
135 # define r25 25
136 # define r26 26
137 # define r27 27
138 # define r28 28
139 # define r29 29
140 # define r30 30
141 # define r31 31
142
143 -- See note above. These aren't actually used for anything except satisfying
144 -- the compiler for globalRegMaybe so I'm unsure if they're the correct
145 -- numberings, should they ever be attempted to be used in the NCG.
146 #if defined(MACHREGS_aarch64) || defined(MACHREGS_arm)
147 # define s0 32
148 # define s1 33
149 # define s2 34
150 # define s3 35
151 # define s4 36
152 # define s5 37
153 # define s6 38
154 # define s7 39
155 # define s8 40
156 # define s9 41
157 # define s10 42
158 # define s11 43
159 # define s12 44
160 # define s13 45
161 # define s14 46
162 # define s15 47
163 # define s16 48
164 # define s17 49
165 # define s18 50
166 # define s19 51
167 # define s20 52
168 # define s21 53
169 # define s22 54
170 # define s23 55
171 # define s24 56
172 # define s25 57
173 # define s26 58
174 # define s27 59
175 # define s28 60
176 # define s29 61
177 # define s30 62
178 # define s31 63
179
180 # define d0 32
181 # define d1 33
182 # define d2 34
183 # define d3 35
184 # define d4 36
185 # define d5 37
186 # define d6 38
187 # define d7 39
188 # define d8 40
189 # define d9 41
190 # define d10 42
191 # define d11 43
192 # define d12 44
193 # define d13 45
194 # define d14 46
195 # define d15 47
196 # define d16 48
197 # define d17 49
198 # define d18 50
199 # define d19 51
200 # define d20 52
201 # define d21 53
202 # define d22 54
203 # define d23 55
204 # define d24 56
205 # define d25 57
206 # define d26 58
207 # define d27 59
208 # define d28 60
209 # define d29 61
210 # define d30 62
211 # define d31 63
212 #endif
213
214 # if defined(MACHREGS_darwin)
215 # define f0 32
216 # define f1 33
217 # define f2 34
218 # define f3 35
219 # define f4 36
220 # define f5 37
221 # define f6 38
222 # define f7 39
223 # define f8 40
224 # define f9 41
225 # define f10 42
226 # define f11 43
227 # define f12 44
228 # define f13 45
229 # define f14 46
230 # define f15 47
231 # define f16 48
232 # define f17 49
233 # define f18 50
234 # define f19 51
235 # define f20 52
236 # define f21 53
237 # define f22 54
238 # define f23 55
239 # define f24 56
240 # define f25 57
241 # define f26 58
242 # define f27 59
243 # define f28 60
244 # define f29 61
245 # define f30 62
246 # define f31 63
247 # else
248 # define fr0 32
249 # define fr1 33
250 # define fr2 34
251 # define fr3 35
252 # define fr4 36
253 # define fr5 37
254 # define fr6 38
255 # define fr7 39
256 # define fr8 40
257 # define fr9 41
258 # define fr10 42
259 # define fr11 43
260 # define fr12 44
261 # define fr13 45
262 # define fr14 46
263 # define fr15 47
264 # define fr16 48
265 # define fr17 49
266 # define fr18 50
267 # define fr19 51
268 # define fr20 52
269 # define fr21 53
270 # define fr22 54
271 # define fr23 55
272 # define fr24 56
273 # define fr25 57
274 # define fr26 58
275 # define fr27 59
276 # define fr28 60
277 # define fr29 61
278 # define fr30 62
279 # define fr31 63
280 # endif
281
282 #elif defined(MACHREGS_sparc)
283
284 # define g0 0
285 # define g1 1
286 # define g2 2
287 # define g3 3
288 # define g4 4
289 # define g5 5
290 # define g6 6
291 # define g7 7
292
293 # define o0 8
294 # define o1 9
295 # define o2 10
296 # define o3 11
297 # define o4 12
298 # define o5 13
299 # define o6 14
300 # define o7 15
301
302 # define l0 16
303 # define l1 17
304 # define l2 18
305 # define l3 19
306 # define l4 20
307 # define l5 21
308 # define l6 22
309 # define l7 23
310
311 # define i0 24
312 # define i1 25
313 # define i2 26
314 # define i3 27
315 # define i4 28
316 # define i5 29
317 # define i6 30
318 # define i7 31
319
320 # define f0 32
321 # define f1 33
322 # define f2 34
323 # define f3 35
324 # define f4 36
325 # define f5 37
326 # define f6 38
327 # define f7 39
328 # define f8 40
329 # define f9 41
330 # define f10 42
331 # define f11 43
332 # define f12 44
333 # define f13 45
334 # define f14 46
335 # define f15 47
336 # define f16 48
337 # define f17 49
338 # define f18 50
339 # define f19 51
340 # define f20 52
341 # define f21 53
342 # define f22 54
343 # define f23 55
344 # define f24 56
345 # define f25 57
346 # define f26 58
347 # define f27 59
348 # define f28 60
349 # define f29 61
350 # define f30 62
351 # define f31 63
352
353 #endif
354
355 callerSaves :: GlobalReg -> Bool
356 #ifdef CALLER_SAVES_Base
357 callerSaves BaseReg = True
358 #endif
359 #ifdef CALLER_SAVES_R1
360 callerSaves (VanillaReg 1 _) = True
361 #endif
362 #ifdef CALLER_SAVES_R2
363 callerSaves (VanillaReg 2 _) = True
364 #endif
365 #ifdef CALLER_SAVES_R3
366 callerSaves (VanillaReg 3 _) = True
367 #endif
368 #ifdef CALLER_SAVES_R4
369 callerSaves (VanillaReg 4 _) = True
370 #endif
371 #ifdef CALLER_SAVES_R5
372 callerSaves (VanillaReg 5 _) = True
373 #endif
374 #ifdef CALLER_SAVES_R6
375 callerSaves (VanillaReg 6 _) = True
376 #endif
377 #ifdef CALLER_SAVES_R7
378 callerSaves (VanillaReg 7 _) = True
379 #endif
380 #ifdef CALLER_SAVES_R8
381 callerSaves (VanillaReg 8 _) = True
382 #endif
383 #ifdef CALLER_SAVES_R9
384 callerSaves (VanillaReg 9 _) = True
385 #endif
386 #ifdef CALLER_SAVES_R10
387 callerSaves (VanillaReg 10 _) = True
388 #endif
389 #ifdef CALLER_SAVES_F1
390 callerSaves (FloatReg 1) = True
391 #endif
392 #ifdef CALLER_SAVES_F2
393 callerSaves (FloatReg 2) = True
394 #endif
395 #ifdef CALLER_SAVES_F3
396 callerSaves (FloatReg 3) = True
397 #endif
398 #ifdef CALLER_SAVES_F4
399 callerSaves (FloatReg 4) = True
400 #endif
401 #ifdef CALLER_SAVES_F5
402 callerSaves (FloatReg 5) = True
403 #endif
404 #ifdef CALLER_SAVES_F6
405 callerSaves (FloatReg 6) = True
406 #endif
407 #ifdef CALLER_SAVES_D1
408 callerSaves (DoubleReg 1) = True
409 #endif
410 #ifdef CALLER_SAVES_D2
411 callerSaves (DoubleReg 2) = True
412 #endif
413 #ifdef CALLER_SAVES_D3
414 callerSaves (DoubleReg 3) = True
415 #endif
416 #ifdef CALLER_SAVES_D4
417 callerSaves (DoubleReg 4) = True
418 #endif
419 #ifdef CALLER_SAVES_D5
420 callerSaves (DoubleReg 5) = True
421 #endif
422 #ifdef CALLER_SAVES_D6
423 callerSaves (DoubleReg 6) = True
424 #endif
425 #ifdef CALLER_SAVES_L1
426 callerSaves (LongReg 1) = True
427 #endif
428 #ifdef CALLER_SAVES_Sp
429 callerSaves Sp = True
430 #endif
431 #ifdef CALLER_SAVES_SpLim
432 callerSaves SpLim = True
433 #endif
434 #ifdef CALLER_SAVES_Hp
435 callerSaves Hp = True
436 #endif
437 #ifdef CALLER_SAVES_HpLim
438 callerSaves HpLim = True
439 #endif
440 #ifdef CALLER_SAVES_CCCS
441 callerSaves CCCS = True
442 #endif
443 #ifdef CALLER_SAVES_CurrentTSO
444 callerSaves CurrentTSO = True
445 #endif
446 #ifdef CALLER_SAVES_CurrentNursery
447 callerSaves CurrentNursery = True
448 #endif
449 callerSaves _ = False
450
451 activeStgRegs :: [GlobalReg]
452 activeStgRegs = [
453 #ifdef REG_Base
454 BaseReg
455 #endif
456 #ifdef REG_Sp
457 ,Sp
458 #endif
459 #ifdef REG_Hp
460 ,Hp
461 #endif
462 #ifdef REG_R1
463 ,VanillaReg 1 VGcPtr
464 #endif
465 #ifdef REG_R2
466 ,VanillaReg 2 VGcPtr
467 #endif
468 #ifdef REG_R3
469 ,VanillaReg 3 VGcPtr
470 #endif
471 #ifdef REG_R4
472 ,VanillaReg 4 VGcPtr
473 #endif
474 #ifdef REG_R5
475 ,VanillaReg 5 VGcPtr
476 #endif
477 #ifdef REG_R6
478 ,VanillaReg 6 VGcPtr
479 #endif
480 #ifdef REG_R7
481 ,VanillaReg 7 VGcPtr
482 #endif
483 #ifdef REG_R8
484 ,VanillaReg 8 VGcPtr
485 #endif
486 #ifdef REG_R9
487 ,VanillaReg 9 VGcPtr
488 #endif
489 #ifdef REG_R10
490 ,VanillaReg 10 VGcPtr
491 #endif
492 #ifdef REG_SpLim
493 ,SpLim
494 #endif
495 #if MAX_REAL_XMM_REG != 0
496 #ifdef REG_F1
497 ,FloatReg 1
498 #endif
499 #ifdef REG_D1
500 ,DoubleReg 1
501 #endif
502 #ifdef REG_XMM1
503 ,XmmReg 1
504 #endif
505 #ifdef REG_YMM1
506 ,YmmReg 1
507 #endif
508 #ifdef REG_ZMM1
509 ,ZmmReg 1
510 #endif
511 #ifdef REG_F2
512 ,FloatReg 2
513 #endif
514 #ifdef REG_D2
515 ,DoubleReg 2
516 #endif
517 #ifdef REG_XMM2
518 ,XmmReg 2
519 #endif
520 #ifdef REG_YMM2
521 ,YmmReg 2
522 #endif
523 #ifdef REG_ZMM2
524 ,ZmmReg 2
525 #endif
526 #ifdef REG_F3
527 ,FloatReg 3
528 #endif
529 #ifdef REG_D3
530 ,DoubleReg 3
531 #endif
532 #ifdef REG_XMM3
533 ,XmmReg 3
534 #endif
535 #ifdef REG_YMM3
536 ,YmmReg 3
537 #endif
538 #ifdef REG_ZMM3
539 ,ZmmReg 3
540 #endif
541 #ifdef REG_F4
542 ,FloatReg 4
543 #endif
544 #ifdef REG_D4
545 ,DoubleReg 4
546 #endif
547 #ifdef REG_XMM4
548 ,XmmReg 4
549 #endif
550 #ifdef REG_YMM4
551 ,YmmReg 4
552 #endif
553 #ifdef REG_ZMM4
554 ,ZmmReg 4
555 #endif
556 #ifdef REG_F5
557 ,FloatReg 5
558 #endif
559 #ifdef REG_D5
560 ,DoubleReg 5
561 #endif
562 #ifdef REG_XMM5
563 ,XmmReg 5
564 #endif
565 #ifdef REG_YMM5
566 ,YmmReg 5
567 #endif
568 #ifdef REG_ZMM5
569 ,ZmmReg 5
570 #endif
571 #ifdef REG_F6
572 ,FloatReg 6
573 #endif
574 #ifdef REG_D6
575 ,DoubleReg 6
576 #endif
577 #ifdef REG_XMM6
578 ,XmmReg 6
579 #endif
580 #ifdef REG_YMM6
581 ,YmmReg 6
582 #endif
583 #ifdef REG_ZMM6
584 ,ZmmReg 6
585 #endif
586 #else /* MAX_REAL_XMM_REG == 0 */
587 #ifdef REG_F1
588 ,FloatReg 1
589 #endif
590 #ifdef REG_F2
591 ,FloatReg 2
592 #endif
593 #ifdef REG_F3
594 ,FloatReg 3
595 #endif
596 #ifdef REG_F4
597 ,FloatReg 4
598 #endif
599 #ifdef REG_F5
600 ,FloatReg 5
601 #endif
602 #ifdef REG_F6
603 ,FloatReg 6
604 #endif
605 #ifdef REG_D1
606 ,DoubleReg 1
607 #endif
608 #ifdef REG_D2
609 ,DoubleReg 2
610 #endif
611 #ifdef REG_D3
612 ,DoubleReg 3
613 #endif
614 #ifdef REG_D4
615 ,DoubleReg 4
616 #endif
617 #ifdef REG_D5
618 ,DoubleReg 5
619 #endif
620 #ifdef REG_D6
621 ,DoubleReg 6
622 #endif
623 #endif /* MAX_REAL_XMM_REG == 0 */
624 ]
625
626 haveRegBase :: Bool
627 #ifdef REG_Base
628 haveRegBase = True
629 #else
630 haveRegBase = False
631 #endif
632
633 -- | Returns 'Nothing' if this global register is not stored
634 -- in a real machine register, otherwise returns @'Just' reg@, where
635 -- reg is the machine register it is stored in.
636 globalRegMaybe :: GlobalReg -> Maybe RealReg
637 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
638 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \
639 || defined(MACHREGS_arm) || defined(MACHREGS_aarch64)
640 # ifdef REG_Base
641 globalRegMaybe BaseReg = Just (RealRegSingle REG_Base)
642 # endif
643 # ifdef REG_R1
644 globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1)
645 # endif
646 # ifdef REG_R2
647 globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2)
648 # endif
649 # ifdef REG_R3
650 globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3)
651 # endif
652 # ifdef REG_R4
653 globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4)
654 # endif
655 # ifdef REG_R5
656 globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5)
657 # endif
658 # ifdef REG_R6
659 globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6)
660 # endif
661 # ifdef REG_R7
662 globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7)
663 # endif
664 # ifdef REG_R8
665 globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8)
666 # endif
667 # ifdef REG_R9
668 globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9)
669 # endif
670 # ifdef REG_R10
671 globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10)
672 # endif
673 # ifdef REG_F1
674 globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1)
675 # endif
676 # ifdef REG_F2
677 globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2)
678 # endif
679 # ifdef REG_F3
680 globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3)
681 # endif
682 # ifdef REG_F4
683 globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4)
684 # endif
685 # ifdef REG_F5
686 globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5)
687 # endif
688 # ifdef REG_F6
689 globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6)
690 # endif
691 # ifdef REG_D1
692 globalRegMaybe (DoubleReg 1) =
693 # if defined(MACHREGS_sparc)
694 Just (RealRegPair REG_D1 (REG_D1 + 1))
695 # else
696 Just (RealRegSingle REG_D1)
697 # endif
698 # endif
699 # ifdef REG_D2
700 globalRegMaybe (DoubleReg 2) =
701 # if defined(MACHREGS_sparc)
702 Just (RealRegPair REG_D2 (REG_D2 + 1))
703 # else
704 Just (RealRegSingle REG_D2)
705 # endif
706 # endif
707 # ifdef REG_D3
708 globalRegMaybe (DoubleReg 3) =
709 # if defined(MACHREGS_sparc)
710 Just (RealRegPair REG_D3 (REG_D3 + 1))
711 # else
712 Just (RealRegSingle REG_D3)
713 # endif
714 # endif
715 # ifdef REG_D4
716 globalRegMaybe (DoubleReg 4) =
717 # if defined(MACHREGS_sparc)
718 Just (RealRegPair REG_D4 (REG_D4 + 1))
719 # else
720 Just (RealRegSingle REG_D4)
721 # endif
722 # endif
723 # ifdef REG_D5
724 globalRegMaybe (DoubleReg 5) =
725 # if defined(MACHREGS_sparc)
726 Just (RealRegPair REG_D5 (REG_D5 + 1))
727 # else
728 Just (RealRegSingle REG_D5)
729 # endif
730 # endif
731 # ifdef REG_D6
732 globalRegMaybe (DoubleReg 6) =
733 # if defined(MACHREGS_sparc)
734 Just (RealRegPair REG_D6 (REG_D6 + 1))
735 # else
736 Just (RealRegSingle REG_D6)
737 # endif
738 # endif
739 # if MAX_REAL_XMM_REG != 0
740 # ifdef REG_XMM1
741 globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1)
742 # endif
743 # ifdef REG_XMM2
744 globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2)
745 # endif
746 # ifdef REG_XMM3
747 globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3)
748 # endif
749 # ifdef REG_XMM4
750 globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4)
751 # endif
752 # ifdef REG_XMM5
753 globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5)
754 # endif
755 # ifdef REG_XMM6
756 globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6)
757 # endif
758 # endif
759 # if defined MAX_REAL_YMM_REG && MAX_REAL_YMM_REG != 0
760 # ifdef REG_YMM1
761 globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1)
762 # endif
763 # ifdef REG_YMM2
764 globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2)
765 # endif
766 # ifdef REG_YMM3
767 globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3)
768 # endif
769 # ifdef REG_YMM4
770 globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4)
771 # endif
772 # ifdef REG_YMM5
773 globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5)
774 # endif
775 # ifdef REG_YMM6
776 globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6)
777 # endif
778 # endif
779 # if defined MAX_REAL_ZMM_REG && MAX_REAL_ZMM_REG != 0
780 # ifdef REG_ZMM1
781 globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1)
782 # endif
783 # ifdef REG_ZMM2
784 globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2)
785 # endif
786 # ifdef REG_ZMM3
787 globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3)
788 # endif
789 # ifdef REG_ZMM4
790 globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4)
791 # endif
792 # ifdef REG_ZMM5
793 globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5)
794 # endif
795 # ifdef REG_ZMM6
796 globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6)
797 # endif
798 # endif
799 # ifdef REG_Sp
800 globalRegMaybe Sp = Just (RealRegSingle REG_Sp)
801 # endif
802 # ifdef REG_Lng1
803 globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1)
804 # endif
805 # ifdef REG_Lng2
806 globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2)
807 # endif
808 # ifdef REG_SpLim
809 globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim)
810 # endif
811 # ifdef REG_Hp
812 globalRegMaybe Hp = Just (RealRegSingle REG_Hp)
813 # endif
814 # ifdef REG_HpLim
815 globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim)
816 # endif
817 # ifdef REG_CurrentTSO
818 globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO)
819 # endif
820 # ifdef REG_CurrentNursery
821 globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery)
822 # endif
823 # ifdef REG_MachSp
824 globalRegMaybe MachSp = Just (RealRegSingle REG_MachSp)
825 # endif
826 globalRegMaybe _ = Nothing
827 #elif defined MACHREGS_NO_REGS
828 globalRegMaybe _ = Nothing
829 #else
830 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
831 #endif
832
833 freeReg :: RegNo -> Bool
834
835 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
836
837 # if defined(MACHREGS_i386)
838 freeReg esp = False -- %esp is the C stack pointer
839 freeReg esi = False -- Note [esi/edi not allocatable]
840 freeReg edi = False
841 # endif
842 # if defined(MACHREGS_x86_64)
843 freeReg rsp = False -- %rsp is the C stack pointer
844 # endif
845
846 {-
847 Note [esi/edi not allocatable]
848
849 %esi is mapped to R1, so %esi would normally be allocatable while it
850 is not being used for R1. However, %esi has no 8-bit version on x86,
851 and the linear register allocator is not sophisticated enough to
852 handle this irregularity (we need more RegClasses). The
853 graph-colouring allocator also cannot handle this - it was designed
854 with more flexibility in mind, but the current implementation is
855 restricted to the same set of classes as the linear allocator.
856
857 Hence, on x86 esi and edi are treated as not allocatable.
858 -}
859
860 -- split patterns in two functions to prevent overlaps
861 freeReg r = freeRegBase r
862
863 freeRegBase :: RegNo -> Bool
864 # ifdef REG_Base
865 freeRegBase REG_Base = False
866 # endif
867 # ifdef REG_Sp
868 freeRegBase REG_Sp = False
869 # endif
870 # ifdef REG_SpLim
871 freeRegBase REG_SpLim = False
872 # endif
873 # ifdef REG_Hp
874 freeRegBase REG_Hp = False
875 # endif
876 # ifdef REG_HpLim
877 freeRegBase REG_HpLim = False
878 # endif
879 -- All other regs are considered to be "free", because we can track
880 -- their liveness accurately.
881 freeRegBase _ = True
882
883 #elif defined(MACHREGS_powerpc)
884
885 freeReg 0 = False -- Used by code setting the back chain pointer
886 -- in stack reallocations on Linux
887 -- r0 is not usable in all insns so also reserved
888 -- on Darwin.
889 freeReg 1 = False -- The Stack Pointer
890 # if !defined(MACHREGS_darwin)
891 -- most non-darwin powerpc OSes use r2 as a TOC pointer or something like that
892 freeReg 2 = False
893 freeReg 13 = False -- reserved for system thread ID on 64 bit
894 -- at least linux in -fPIC relies on r30 in PLT stubs
895 freeReg 30 = False
896 {- TODO: reserve r13 on 64 bit systems only and r30 on 32 bit respectively.
897 For now we use r30 on 64 bit and r13 on 32 bit as a temporary register
898 in stack handling code. See compiler/nativeGen/PPC/Ppr.hs.
899
900 Later we might want to reserve r13 and r30 only where it is required.
901 Then use r12 as temporary register, which is also what the C ABI does.
902 -}
903
904 # endif
905 # ifdef REG_Base
906 freeReg REG_Base = False
907 # endif
908 # ifdef REG_R1
909 freeReg REG_R1 = False
910 # endif
911 # ifdef REG_R2
912 freeReg REG_R2 = False
913 # endif
914 # ifdef REG_R3
915 freeReg REG_R3 = False
916 # endif
917 # ifdef REG_R4
918 freeReg REG_R4 = False
919 # endif
920 # ifdef REG_R5
921 freeReg REG_R5 = False
922 # endif
923 # ifdef REG_R6
924 freeReg REG_R6 = False
925 # endif
926 # ifdef REG_R7
927 freeReg REG_R7 = False
928 # endif
929 # ifdef REG_R8
930 freeReg REG_R8 = False
931 # endif
932 # ifdef REG_R9
933 freeReg REG_R9 = False
934 # endif
935 # ifdef REG_R10
936 freeReg REG_R10 = False
937 # endif
938 # ifdef REG_F1
939 freeReg REG_F1 = False
940 # endif
941 # ifdef REG_F2
942 freeReg REG_F2 = False
943 # endif
944 # ifdef REG_F3
945 freeReg REG_F3 = False
946 # endif
947 # ifdef REG_F4
948 freeReg REG_F4 = False
949 # endif
950 # ifdef REG_F5
951 freeReg REG_F5 = False
952 # endif
953 # ifdef REG_F6
954 freeReg REG_F6 = False
955 # endif
956 # ifdef REG_D1
957 freeReg REG_D1 = False
958 # endif
959 # ifdef REG_D2
960 freeReg REG_D2 = False
961 # endif
962 # ifdef REG_D3
963 freeReg REG_D3 = False
964 # endif
965 # ifdef REG_D4
966 freeReg REG_D4 = False
967 # endif
968 # ifdef REG_D5
969 freeReg REG_D5 = False
970 # endif
971 # ifdef REG_D6
972 freeReg REG_D6 = False
973 # endif
974 # ifdef REG_Sp
975 freeReg REG_Sp = False
976 # endif
977 # ifdef REG_Su
978 freeReg REG_Su = False
979 # endif
980 # ifdef REG_SpLim
981 freeReg REG_SpLim = False
982 # endif
983 # ifdef REG_Hp
984 freeReg REG_Hp = False
985 # endif
986 # ifdef REG_HpLim
987 freeReg REG_HpLim = False
988 # endif
989 freeReg _ = True
990
991 #elif defined(MACHREGS_sparc)
992
993 -- SPARC regs used by the OS / ABI
994 -- %g0(r0) is always zero
995 freeReg g0 = False
996
997 -- %g5(r5) - %g7(r7)
998 -- are reserved for the OS
999 freeReg g5 = False
1000 freeReg g6 = False
1001 freeReg g7 = False
1002
1003 -- %o6(r14)
1004 -- is the C stack pointer
1005 freeReg o6 = False
1006
1007 -- %o7(r15)
1008 -- holds the C return address
1009 freeReg o7 = False
1010
1011 -- %i6(r30)
1012 -- is the C frame pointer
1013 freeReg i6 = False
1014
1015 -- %i7(r31)
1016 -- is used for C return addresses
1017 freeReg i7 = False
1018
1019 -- %f0(r32) - %f1(r32)
1020 -- are C floating point return regs
1021 freeReg f0 = False
1022 freeReg f1 = False
1023
1024 {-
1025 freeReg regNo
1026 -- don't release high half of double regs
1027 | regNo >= f0
1028 , regNo < NCG_FirstFloatReg
1029 , regNo `mod` 2 /= 0
1030 = False
1031 -}
1032
1033 # ifdef REG_Base
1034 freeReg REG_Base = False
1035 # endif
1036 # ifdef REG_R1
1037 freeReg REG_R1 = False
1038 # endif
1039 # ifdef REG_R2
1040 freeReg REG_R2 = False
1041 # endif
1042 # ifdef REG_R3
1043 freeReg REG_R3 = False
1044 # endif
1045 # ifdef REG_R4
1046 freeReg REG_R4 = False
1047 # endif
1048 # ifdef REG_R5
1049 freeReg REG_R5 = False
1050 # endif
1051 # ifdef REG_R6
1052 freeReg REG_R6 = False
1053 # endif
1054 # ifdef REG_R7
1055 freeReg REG_R7 = False
1056 # endif
1057 # ifdef REG_R8
1058 freeReg REG_R8 = False
1059 # endif
1060 # ifdef REG_R9
1061 freeReg REG_R9 = False
1062 # endif
1063 # ifdef REG_R10
1064 freeReg REG_R10 = False
1065 # endif
1066 # ifdef REG_F1
1067 freeReg REG_F1 = False
1068 # endif
1069 # ifdef REG_F2
1070 freeReg REG_F2 = False
1071 # endif
1072 # ifdef REG_F3
1073 freeReg REG_F3 = False
1074 # endif
1075 # ifdef REG_F4
1076 freeReg REG_F4 = False
1077 # endif
1078 # ifdef REG_F5
1079 freeReg REG_F5 = False
1080 # endif
1081 # ifdef REG_F6
1082 freeReg REG_F6 = False
1083 # endif
1084 # ifdef REG_D1
1085 freeReg REG_D1 = False
1086 # endif
1087 # ifdef REG_D1_2
1088 freeReg REG_D1_2 = False
1089 # endif
1090 # ifdef REG_D2
1091 freeReg REG_D2 = False
1092 # endif
1093 # ifdef REG_D2_2
1094 freeReg REG_D2_2 = False
1095 # endif
1096 # ifdef REG_D3
1097 freeReg REG_D3 = False
1098 # endif
1099 # ifdef REG_D3_2
1100 freeReg REG_D3_2 = False
1101 # endif
1102 # ifdef REG_D4
1103 freeReg REG_D4 = False
1104 # endif
1105 # ifdef REG_D4_2
1106 freeReg REG_D4_2 = False
1107 # endif
1108 # ifdef REG_D5
1109 freeReg REG_D5 = False
1110 # endif
1111 # ifdef REG_D5_2
1112 freeReg REG_D5_2 = False
1113 # endif
1114 # ifdef REG_D6
1115 freeReg REG_D6 = False
1116 # endif
1117 # ifdef REG_D6_2
1118 freeReg REG_D6_2 = False
1119 # endif
1120 # ifdef REG_Sp
1121 freeReg REG_Sp = False
1122 # endif
1123 # ifdef REG_Su
1124 freeReg REG_Su = False
1125 # endif
1126 # ifdef REG_SpLim
1127 freeReg REG_SpLim = False
1128 # endif
1129 # ifdef REG_Hp
1130 freeReg REG_Hp = False
1131 # endif
1132 # ifdef REG_HpLim
1133 freeReg REG_HpLim = False
1134 # endif
1135 freeReg _ = True
1136
1137 #else
1138
1139 freeReg = panic "freeReg not defined for this platform"
1140
1141 #endif
1142