fixes to PPC version of cas(), from David Kirkman <dkirkman@gmail.com>
[ghc.git] / includes / SMP.h
1 /* ----------------------------------------------------------------------------
2 *
3 * (c) The GHC Team, 2005
4 *
5 * Macros for THREADED_RTS support
6 *
7 * -------------------------------------------------------------------------- */
8
9 #ifndef SMP_H
10 #define SMP_H
11
12 /* THREADED_RTS is currently not compatible with the following options:
13 *
14 * PROFILING (but only 1 CPU supported)
15 * TICKY_TICKY
16 * Unregisterised builds are ok, but only 1 CPU supported.
17 */
18
19 #if defined(THREADED_RTS)
20
21 #if defined(TICKY_TICKY)
22 #error Build options incompatible with THREADED_RTS.
23 #endif
24
25 /*
26 * XCHG - the atomic exchange instruction. Used for locking closures
27 * during updates (see lockClosure() below) and the MVar primops.
28 *
29 * NB: the xchg instruction is implicitly locked, so we do not need
30 * a lock prefix here.
31 */
32 INLINE_HEADER StgWord
33 xchg(StgPtr p, StgWord w)
34 {
35 StgWord result;
36 #if i386_HOST_ARCH || x86_64_HOST_ARCH
37 result = w;
38 __asm__ __volatile__ (
39 "xchg %1,%0"
40 :"+r" (result), "+m" (*p)
41 : /* no input-only operands */
42 );
43 #elif powerpc_HOST_ARCH
44 __asm__ __volatile__ (
45 "1: lwarx %0, 0, %2\n"
46 " stwcx. %1, 0, %2\n"
47 " bne- 1b"
48 :"=r" (result)
49 :"r" (w), "r" (p)
50 );
51 #else
52 #error xchg() unimplemented on this architecture
53 #endif
54 return result;
55 }
56
57 /*
58 * CMPXCHG - the single-word atomic compare-and-exchange instruction. Used
59 * in the STM implementation.
60 */
61 INLINE_HEADER StgWord
62 cas(StgVolatilePtr p, StgWord o, StgWord n)
63 {
64 #if i386_HOST_ARCH || x86_64_HOST_ARCH
65 __asm__ __volatile__ (
66 "lock/cmpxchg %3,%1"
67 :"=a"(o), "=m" (*(volatile unsigned int *)p)
68 :"0" (o), "r" (n));
69 return o;
70 #elif powerpc_HOST_ARCH
71 StgWord result;
72 __asm__ __volatile__ (
73 "1: lwarx %0, 0, %3\n"
74 " cmpw %0, %1\n"
75 " bne 2f\n"
76 " stwcx. %2, 0, %3\n"
77 " bne- 1b\n"
78 "2:"
79 :"=&r" (result)
80 :"r" (o), "r" (n), "r" (p)
81 :"cc", "memory"
82 );
83 return result;
84 #else
85 #error cas() unimplemented on this architecture
86 #endif
87 }
88
89 /*
90 * Write barrier - ensure that all preceding writes have happened
91 * before all following writes.
92 *
93 * We need to tell both the compiler AND the CPU about the barrier.
94 * This is a brute force solution; better results might be obtained by
95 * using volatile type declarations to get fine-grained ordering
96 * control in C, and optionally a memory barrier instruction on CPUs
97 * that require it (not x86 or x86_64).
98 */
99 INLINE_HEADER void
100 write_barrier(void) {
101 #if i386_HOST_ARCH || x86_64_HOST_ARCH
102 __asm__ __volatile__ ("" : : : "memory");
103 #elif powerpc_HOST_ARCH
104 __asm__ __volatile__ ("lwsync" : : : "memory");
105 #else
106 #error memory barriers unimplemented on this architecture
107 #endif
108 }
109
110 /*
111 * Locking/unlocking closures
112 *
113 * This is used primarily in the implementation of MVars.
114 */
115 #define SPIN_COUNT 4000
116
117 INLINE_HEADER StgInfoTable *
118 lockClosure(StgClosure *p)
119 {
120 #if i386_HOST_ARCH || x86_64_HOST_ARCH || powerpc_HOST_ARCH
121 StgWord info;
122 do {
123 nat i = 0;
124 do {
125 info = xchg((P_)(void *)&p->header.info, (W_)&stg_WHITEHOLE_info);
126 if (info != (W_)&stg_WHITEHOLE_info) return (StgInfoTable *)info;
127 } while (++i < SPIN_COUNT);
128 yieldThread();
129 } while (1);
130 #else
131 ACQUIRE_SM_LOCK
132 #endif
133 }
134
135 INLINE_HEADER void
136 unlockClosure(StgClosure *p, StgInfoTable *info)
137 {
138 #if i386_HOST_ARCH || x86_64_HOST_ARCH || powerpc_HOST_ARCH
139 // This is a strictly ordered write, so we need a wb():
140 write_barrier();
141 p->header.info = info;
142 #else
143 RELEASE_SM_LOCK;
144 #endif
145 }
146
147 #else /* !THREADED_RTS */
148
149 #define write_barrier() /* nothing */
150
151 INLINE_HEADER StgWord
152 xchg(StgPtr p, StgWord w)
153 {
154 StgWord old = *p;
155 *p = w;
156 return old;
157 }
158
159 INLINE_HEADER StgInfoTable *
160 lockClosure(StgClosure *p)
161 { return (StgInfoTable *)p->header.info; }
162
163 INLINE_HEADER void
164 unlockClosure(StgClosure *p STG_UNUSED, StgInfoTable *info STG_UNUSED)
165 { /* nothing */ }
166
167 #endif /* !THREADED_RTS */
168
169 // Handy specialised versions of lockClosure()/unlockClosure()
170 INLINE_HEADER void lockTSO(StgTSO *tso)
171 { lockClosure((StgClosure *)tso); }
172
173 INLINE_HEADER void unlockTSO(StgTSO *tso)
174 { unlockClosure((StgClosure*)tso, (StgInfoTable*)&stg_TSO_info); }
175
176 #endif /* SMP_H */