Allocate bss section within proper range of other sections
[ghc.git] / rts / linker / Elf.c
1 #include "Rts.h"
2
3 #if defined(linux_HOST_OS) || defined(solaris2_HOST_OS) \
4 || defined(linux_android_HOST_OS) \
5 || defined(freebsd_HOST_OS) || defined(kfreebsdgnu_HOST_OS) \
6 || defined(dragonfly_HOST_OS) || defined(netbsd_HOST_OS) \
7 || defined(openbsd_HOST_OS) || defined(gnu_HOST_OS)
8
9 // It is essential that this is included before any <elf.h> is included. <elf.h>
10 // defines R_XXX relocations, which would interfere with the COMPAT_R_XXX
11 // relocations we generate. E.g. COMPAT_ ## R_ARM_ARM32 would end up as
12 // const unsigned COMPAT_3 = 0x03; instead of
13 // const unsigned COMPAT_R_ARM_ARM32 = 0x03;
14 #include "elf_compat.h"
15
16 #include "RtsUtils.h"
17 #include "RtsSymbolInfo.h"
18 #include "linker/Elf.h"
19 #include "linker/CacheFlush.h"
20 #include "linker/M32Alloc.h"
21 #include "linker/SymbolExtras.h"
22 #include "sm/OSMem.h"
23 #include "GetEnv.h"
24 #include "linker/util.h"
25 #include "linker/elf_util.h"
26
27 #include <stdlib.h>
28 #include <string.h>
29 #if defined(HAVE_SYS_STAT_H)
30 #include <sys/stat.h>
31 #endif
32 #if defined(HAVE_SYS_TYPES_H)
33 #include <sys/types.h>
34 #endif
35 #if defined(HAVE_FCNTL_H)
36 #include <fcntl.h>
37 #endif
38 #if defined(dragonfly_HOST_OS)
39 #include <sys/tls.h>
40 #endif
41
42 /* on x86_64 we have a problem with relocating symbol references in
43 * code that was compiled without -fPIC. By default, the small memory
44 * model is used, which assumes that symbol references can fit in a
45 * 32-bit slot. The system dynamic linker makes this work for
46 * references to shared libraries by either (a) allocating a jump
47 * table slot for code references, or (b) moving the symbol at load
48 * time (and copying its contents, if necessary) for data references.
49 *
50 * We unfortunately can't tell whether symbol references are to code
51 * or data. So for now we assume they are code (the vast majority
52 * are), and allocate jump-table slots. Unfortunately this will
53 * SILENTLY generate crashing code for data references. This hack is
54 * enabled by X86_64_ELF_NONPIC_HACK.
55 *
56 * One workaround is to use shared Haskell libraries. This is
57 * coming. Another workaround is to keep the static libraries but
58 * compile them with -fPIC, because that will generate PIC references
59 * to data which can be relocated. The PIC code is still too green to
60 * do this systematically, though.
61 *
62 * See bug #781
63 * See thread http://www.haskell.org/pipermail/cvs-ghc/2007-September/038458.html
64 *
65 * Naming Scheme for Symbol Macros
66 *
67 * SymI_*: symbol is internal to the RTS. It resides in an object
68 * file/library that is statically.
69 * SymE_*: symbol is external to the RTS library. It might be linked
70 * dynamically.
71 *
72 * Sym*_HasProto : the symbol prototype is imported in an include file
73 * or defined explicitly
74 * Sym*_NeedsProto: the symbol is undefined and we add a dummy
75 * default proto extern void sym(void);
76 */
77 #define X86_64_ELF_NONPIC_HACK 1
78
79 #if defined(sparc_HOST_ARCH)
80 # define ELF_TARGET_SPARC /* Used inside <elf.h> */
81 #elif defined(i386_HOST_ARCH)
82 # define ELF_TARGET_386 /* Used inside <elf.h> */
83 #elif defined(x86_64_HOST_ARCH)
84 # define ELF_TARGET_X64_64
85 # define ELF_TARGET_AMD64 /* Used inside <elf.h> on Solaris 11 */
86 #endif
87
88 #if !defined(openbsd_HOST_OS)
89 # include <elf.h>
90 #else
91 /* openbsd elf has things in different places, with diff names */
92 # include <elf_abi.h>
93 #endif
94
95 #if defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
96 # define NEED_GOT
97 # define NEED_PLT
98 # include "elf_got.h"
99 # include "elf_plt.h"
100 # include "elf_reloc.h"
101 #endif
102
103 /*
104
105 Note [Many ELF Sections]
106
107 The normal section number fields in ELF are limited to 16 bits, which runs
108 out of bits when you try to cram in more sections than that.
109
110 To solve this, the fields e_shnum and e_shstrndx in the ELF header have an
111 escape value (different for each case), and the actual section number is
112 stashed into unused fields in the first section header.
113
114 For symbols, there seems to have been no place in the actual symbol table
115 for the extra bits, so the indexes have been moved into an auxiliary
116 section instead.
117 For symbols in sections beyond 0xff00, the symbol's st_shndx will be an
118 escape value (SHN_XINDEX), and the actual 32-bit section number for symbol N
119 is stored at index N in the SHT_SYMTAB_SHNDX table.
120
121 These extensions seem to be undocumented in version 4.1 of the ABI and only
122 appear in the drafts for the "next" version:
123 https://refspecs.linuxfoundation.org/elf/gabi4+/contents.html
124
125 */
126
127 static Elf_Word elf_shnum(Elf_Ehdr* ehdr)
128 {
129 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
130 Elf_Half shnum = ehdr->e_shnum;
131 return shnum != SHN_UNDEF ? shnum : shdr[0].sh_size;
132 }
133
134 static Elf_Word elf_shstrndx(Elf_Ehdr* ehdr)
135 {
136 Elf_Half shstrndx = ehdr->e_shstrndx;
137 #if defined(SHN_XINDEX)
138 Elf_Shdr* shdr = (Elf_Shdr*) ((char*)ehdr + ehdr->e_shoff);
139 return shstrndx != SHN_XINDEX ? shstrndx : shdr[0].sh_link;
140 #else
141 // some OSes do not support SHN_XINDEX yet, let's revert to
142 // old way
143 return shstrndx;
144 #endif
145 }
146
147 #if defined(SHN_XINDEX)
148 static Elf_Word*
149 get_shndx_table(Elf_Ehdr* ehdr)
150 {
151 Elf_Word i;
152 char* ehdrC = (char*)ehdr;
153 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
154 const Elf_Word shnum = elf_shnum(ehdr);
155
156 for (i = 0; i < shnum; i++) {
157 if (shdr[i].sh_type == SHT_SYMTAB_SHNDX) {
158 return (Elf32_Word*)(ehdrC + shdr[i].sh_offset);
159 }
160 }
161 return NULL;
162 }
163 #endif
164
165 /*
166 * ocInit and ocDeinit
167 */
168
169 void
170 ocInit_ELF(ObjectCode * oc)
171 {
172 ocDeinit_ELF(oc);
173
174 oc->info = (struct ObjectCodeFormatInfo*)stgCallocBytes(
175 1, sizeof *oc->info,
176 "ocInit_Elf(ObjectCodeFormatInfo)");
177 // TODO: fill info
178 oc->info->elfHeader = (Elf_Ehdr *)oc->image;
179 oc->info->programHeader = (Elf_Phdr *) ((uint8_t*)oc->image
180 + oc->info->elfHeader->e_phoff);
181 oc->info->sectionHeader = (Elf_Shdr *) ((uint8_t*)oc->image
182 + oc->info->elfHeader->e_shoff);
183 oc->info->sectionHeaderStrtab = (char*)((uint8_t*)oc->image +
184 oc->info->sectionHeader[oc->info->elfHeader->e_shstrndx].sh_offset);
185
186 oc->n_sections = elf_shnum(oc->info->elfHeader);
187
188 /* get the symbol table(s) */
189 for(int i=0; i < oc->n_sections; i++) {
190 if(SHT_REL == oc->info->sectionHeader[i].sh_type) {
191 ElfRelocationTable *relTab = (ElfRelocationTable *)stgCallocBytes(
192 1, sizeof(ElfRelocationTable),
193 "ocInit_Elf(ElfRelocationTable");
194 relTab->index = i;
195
196 relTab->relocations =
197 (Elf_Rel*) ((uint8_t*)oc->info->elfHeader
198 + oc->info->sectionHeader[i].sh_offset);
199 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
200 / sizeof(Elf_Rel);
201 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
202
203 relTab->sectionHeader = &oc->info->sectionHeader[i];
204
205 if(oc->info->relTable == NULL) {
206 oc->info->relTable = relTab;
207 } else {
208 ElfRelocationTable * tail = oc->info->relTable;
209 while(tail->next != NULL) tail = tail->next;
210 tail->next = relTab;
211 }
212
213 } else if(SHT_RELA == oc->info->sectionHeader[i].sh_type) {
214 ElfRelocationATable *relTab = (ElfRelocationATable *)stgCallocBytes(
215 1, sizeof(ElfRelocationATable),
216 "ocInit_Elf(ElfRelocationTable");
217 relTab->index = i;
218
219 relTab->relocations =
220 (Elf_Rela*) ((uint8_t*)oc->info->elfHeader
221 + oc->info->sectionHeader[i].sh_offset);
222 relTab->n_relocations = oc->info->sectionHeader[i].sh_size
223 / sizeof(Elf_Rela);
224 relTab->targetSectionIndex = oc->info->sectionHeader[i].sh_info;
225
226 relTab->sectionHeader = &oc->info->sectionHeader[i];
227
228 if(oc->info->relaTable == NULL) {
229 oc->info->relaTable = relTab;
230 } else {
231 ElfRelocationATable * tail = oc->info->relaTable;
232 while(tail->next != NULL) tail = tail->next;
233 tail->next = relTab;
234 }
235
236 } else if(SHT_SYMTAB == oc->info->sectionHeader[i].sh_type) {
237
238 ElfSymbolTable *symTab = (ElfSymbolTable *)stgCallocBytes(
239 1, sizeof(ElfSymbolTable),
240 "ocInit_Elf(ElfSymbolTable");
241
242 symTab->index = i; /* store the original index, so we can later
243 * find or assert that we are dealing with the
244 * correct symbol table */
245
246 Elf_Sym *stab = (Elf_Sym*)((uint8_t*)oc->info->elfHeader
247 + oc->info->sectionHeader[i].sh_offset);
248 symTab->n_symbols = oc->info->sectionHeader[i].sh_size
249 / sizeof(Elf_Sym);
250 symTab->symbols = (ElfSymbol *)stgCallocBytes(
251 symTab->n_symbols, sizeof(ElfSymbol),
252 "ocInit_Elf(ElfSymbol)");
253
254 /* get the strings table */
255 size_t lnkIdx = oc->info->sectionHeader[i].sh_link;
256 symTab->names = (char*)(uint8_t*)oc->info->elfHeader
257 + oc->info->sectionHeader[lnkIdx].sh_offset;
258
259 /* build the ElfSymbols from the symbols */
260 for(size_t j=0; j < symTab->n_symbols; j++) {
261
262 symTab->symbols[j].name = stab[j].st_name == 0
263 ? "(noname)"
264 : symTab->names + stab[j].st_name;
265 symTab->symbols[j].elf_sym = &stab[j];
266 /* we don't have an address for this symbol yet; this will be
267 * populated during ocGetNames. hence addr = NULL.
268 */
269 symTab->symbols[j].addr = NULL;
270 symTab->symbols[j].got_addr = NULL;
271 }
272
273 /* append the ElfSymbolTable */
274 if(oc->info->symbolTables == NULL) {
275 oc->info->symbolTables = symTab;
276 } else {
277 ElfSymbolTable * tail = oc->info->symbolTables;
278 while(tail->next != NULL) tail = tail->next;
279 tail->next = symTab;
280 }
281 }
282 }
283 }
284
285 void
286 ocDeinit_ELF(ObjectCode * oc)
287 {
288 /* free all ElfSymbolTables, and their associated
289 * ElfSymbols
290 */
291 if(oc->info != NULL) {
292 #if defined(NEED_GOT)
293 freeGot(oc);
294 #endif
295 ElfSymbolTable * last = oc->info->symbolTables;
296
297 while(last != NULL) {
298 ElfSymbolTable * t = last;
299 last = last->next;
300 stgFree(t->symbols);
301 stgFree(t);
302 }
303
304 {
305 ElfRelocationTable *last = oc->info->relTable;
306 while (last != NULL) {
307 ElfRelocationTable *t = last;
308 last = last->next;
309 stgFree(t);
310 }
311 }
312
313 {
314 ElfRelocationATable *last = oc->info->relaTable;
315 while (last != NULL) {
316 ElfRelocationATable *t = last;
317 last = last->next;
318 stgFree(t);
319 }
320 }
321
322 stgFree(oc->info);
323 oc->info = NULL;
324 }
325 }
326
327 /*
328 * Generic ELF functions
329 */
330
331 int
332 ocVerifyImage_ELF ( ObjectCode* oc )
333 {
334 Elf_Shdr* shdr;
335 Elf_Sym* stab;
336 int j, nent, nstrtab, nsymtabs;
337 Elf_Word i, shnum, shstrndx;
338 char* sh_strtab;
339
340 char* ehdrC = (char*)(oc->image);
341 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
342
343 if (ehdr->e_ident[EI_MAG0] != ELFMAG0 ||
344 ehdr->e_ident[EI_MAG1] != ELFMAG1 ||
345 ehdr->e_ident[EI_MAG2] != ELFMAG2 ||
346 ehdr->e_ident[EI_MAG3] != ELFMAG3) {
347 errorBelch("%s: not an ELF object", oc->fileName);
348 return 0;
349 }
350
351 if (ehdr->e_ident[EI_CLASS] != ELFCLASS) {
352 errorBelch("%s: unsupported ELF format", oc->fileName);
353 return 0;
354 }
355
356 if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) {
357 IF_DEBUG(linker,debugBelch( "Is little-endian\n" ));
358 } else
359 if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) {
360 IF_DEBUG(linker,debugBelch( "Is big-endian\n" ));
361 } else {
362 errorBelch("%s: unknown endianness", oc->fileName);
363 return 0;
364 }
365
366 if (ehdr->e_type != ET_REL) {
367 errorBelch("%s: not a relocatable object (.o) file", oc->fileName);
368 return 0;
369 }
370 IF_DEBUG(linker, debugBelch( "Is a relocatable object (.o) file\n" ));
371
372 IF_DEBUG(linker,debugBelch( "Architecture is " ));
373 switch (ehdr->e_machine) {
374 #if defined(EM_ARM)
375 case EM_ARM: IF_DEBUG(linker,debugBelch( "arm" )); break;
376 #endif
377 case EM_386: IF_DEBUG(linker,debugBelch( "x86" )); break;
378 #if defined(EM_SPARC32PLUS)
379 case EM_SPARC32PLUS:
380 #endif
381 case EM_SPARC: IF_DEBUG(linker,debugBelch( "sparc" )); break;
382 #if defined(EM_IA_64)
383 case EM_IA_64: IF_DEBUG(linker,debugBelch( "ia64" )); break;
384 #endif
385 case EM_PPC: IF_DEBUG(linker,debugBelch( "powerpc32" )); break;
386 #if defined(EM_PPC64)
387 case EM_PPC64: IF_DEBUG(linker,debugBelch( "powerpc64" ));
388 errorBelch("%s: RTS linker not implemented on PowerPC 64-bit",
389 oc->fileName);
390 return 0;
391 #endif
392 #if defined(EM_X86_64)
393 case EM_X86_64: IF_DEBUG(linker,debugBelch( "x86_64" )); break;
394 #elif defined(EM_AMD64)
395 case EM_AMD64: IF_DEBUG(linker,debugBelch( "amd64" )); break;
396 #endif
397 #if defined(EM_AARCH64)
398 case EM_AARCH64: IF_DEBUG(linker,debugBelch( "aarch64" )); break;
399 #endif
400 default: IF_DEBUG(linker,debugBelch( "unknown" ));
401 errorBelch("%s: unknown architecture (e_machine == %d)"
402 , oc->fileName, ehdr->e_machine);
403 return 0;
404 }
405
406 shnum = elf_shnum(ehdr);
407 IF_DEBUG(linker,debugBelch(
408 "\nSection header table: start %ld, n_entries %d, ent_size %d\n",
409 (long)ehdr->e_shoff, shnum, ehdr->e_shentsize ));
410
411 ASSERT(ehdr->e_shentsize == sizeof(Elf_Shdr));
412
413 shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
414
415 shstrndx = elf_shstrndx(ehdr);
416 if (shstrndx == SHN_UNDEF) {
417 errorBelch("%s: no section header string table", oc->fileName);
418 return 0;
419 } else {
420 IF_DEBUG(linker,debugBelch( "Section header string table is section %d\n",
421 shstrndx));
422 sh_strtab = ehdrC + shdr[shstrndx].sh_offset;
423 }
424
425 for (i = 0; i < shnum; i++) {
426 IF_DEBUG(linker,debugBelch("%2d: ", i ));
427 IF_DEBUG(linker,debugBelch("type=%2d ", (int)shdr[i].sh_type ));
428 IF_DEBUG(linker,debugBelch("size=%4d ", (int)shdr[i].sh_size ));
429 IF_DEBUG(linker,debugBelch("offs=%4d ", (int)shdr[i].sh_offset ));
430 IF_DEBUG(linker,debugBelch(" (%p .. %p) ",
431 ehdrC + shdr[i].sh_offset,
432 ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1));
433
434 #define SECTION_INDEX_VALID(ndx) (ndx > SHN_UNDEF && ndx < shnum)
435
436 switch (shdr[i].sh_type) {
437
438 case SHT_REL:
439 case SHT_RELA:
440 IF_DEBUG(linker,debugBelch( shdr[i].sh_type == SHT_REL ? "Rel " : "RelA "));
441
442 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
443 if (shdr[i].sh_link == SHN_UNDEF)
444 errorBelch("\n%s: relocation section #%d has no symbol table\n"
445 "This object file has probably been fully stripped. "
446 "Such files cannot be linked.\n",
447 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
448 else
449 errorBelch("\n%s: relocation section #%d has an invalid link field (%d)\n",
450 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
451 i, shdr[i].sh_link);
452 return 0;
453 }
454 if (shdr[shdr[i].sh_link].sh_type != SHT_SYMTAB) {
455 errorBelch("\n%s: relocation section #%d does not link to a symbol table\n",
456 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
457 return 0;
458 }
459 if (!SECTION_INDEX_VALID(shdr[i].sh_info)) {
460 errorBelch("\n%s: relocation section #%d has an invalid info field (%d)\n",
461 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
462 i, shdr[i].sh_info);
463 return 0;
464 }
465
466 break;
467 case SHT_SYMTAB:
468 IF_DEBUG(linker,debugBelch("Sym "));
469
470 if (!SECTION_INDEX_VALID(shdr[i].sh_link)) {
471 errorBelch("\n%s: symbol table section #%d has an invalid link field (%d)\n",
472 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName,
473 i, shdr[i].sh_link);
474 return 0;
475 }
476 if (shdr[shdr[i].sh_link].sh_type != SHT_STRTAB) {
477 errorBelch("\n%s: symbol table section #%d does not link to a string table\n",
478 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName, i);
479
480 return 0;
481 }
482 break;
483 case SHT_STRTAB: IF_DEBUG(linker,debugBelch("Str ")); break;
484 default: IF_DEBUG(linker,debugBelch(" ")); break;
485 }
486 if (sh_strtab) {
487 IF_DEBUG(linker,debugBelch("sname=%s\n", sh_strtab + shdr[i].sh_name ));
488 }
489 }
490
491 IF_DEBUG(linker,debugBelch( "\nString tables\n" ));
492 nstrtab = 0;
493 for (i = 0; i < shnum; i++) {
494 if (shdr[i].sh_type == SHT_STRTAB
495 /* Ignore the section header's string table. */
496 && i != shstrndx
497 /* Ignore string tables named .stabstr, as they contain
498 debugging info. */
499 && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
500 ) {
501 IF_DEBUG(linker,debugBelch(" section %d is a normal string table\n", i ));
502 nstrtab++;
503 }
504 }
505 if (nstrtab == 0) {
506 IF_DEBUG(linker,debugBelch(" no normal string tables (potentially, but not necessarily a problem)\n"));
507 }
508 #if defined(SHN_XINDEX)
509 Elf_Word* shndxTable = get_shndx_table(ehdr);
510 #endif
511 nsymtabs = 0;
512 IF_DEBUG(linker,debugBelch( "Symbol tables\n" ));
513 for (i = 0; i < shnum; i++) {
514 if (shdr[i].sh_type != SHT_SYMTAB) continue;
515 IF_DEBUG(linker,debugBelch( "section %d is a symbol table\n", i ));
516 nsymtabs++;
517 stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
518 nent = shdr[i].sh_size / sizeof(Elf_Sym);
519 IF_DEBUG(linker,debugBelch( " number of entries is apparently %d (%ld rem)\n",
520 nent,
521 (long)shdr[i].sh_size % sizeof(Elf_Sym)
522 ));
523 if (0 != shdr[i].sh_size % sizeof(Elf_Sym)) {
524 errorBelch("%s: non-integral number of symbol table entries", oc->fileName);
525 return 0;
526 }
527 for (j = 0; j < nent; j++) {
528 Elf_Word secno = stab[j].st_shndx;
529 #if defined(SHN_XINDEX)
530 /* See Note [Many ELF Sections] */
531 if (secno == SHN_XINDEX) {
532 ASSERT(shndxTable);
533 secno = shndxTable[j];
534 }
535 #endif
536 IF_DEBUG(linker,debugBelch(" %2d ", j ));
537 IF_DEBUG(linker,debugBelch(" sec=%-5d size=%-3d val=%5p ",
538 (int)secno,
539 (int)stab[j].st_size,
540 (char*)stab[j].st_value ));
541
542 IF_DEBUG(linker,debugBelch("type=" ));
543 switch (ELF_ST_TYPE(stab[j].st_info)) {
544 case STT_NOTYPE: IF_DEBUG(linker,debugBelch("notype " )); break;
545 case STT_OBJECT: IF_DEBUG(linker,debugBelch("object " )); break;
546 case STT_FUNC : IF_DEBUG(linker,debugBelch("func " )); break;
547 case STT_SECTION: IF_DEBUG(linker,debugBelch("section" )); break;
548 case STT_FILE: IF_DEBUG(linker,debugBelch("file " )); break;
549 default: IF_DEBUG(linker,debugBelch("? " )); break;
550 }
551 IF_DEBUG(linker,debugBelch(" " ));
552
553 IF_DEBUG(linker,debugBelch("bind=" ));
554 switch (ELF_ST_BIND(stab[j].st_info)) {
555 case STB_LOCAL : IF_DEBUG(linker,debugBelch("local " )); break;
556 case STB_GLOBAL: IF_DEBUG(linker,debugBelch("global" )); break;
557 case STB_WEAK : IF_DEBUG(linker,debugBelch("weak " )); break;
558 default: IF_DEBUG(linker,debugBelch("? " )); break;
559 }
560 IF_DEBUG(linker,debugBelch(" " ));
561
562 IF_DEBUG(linker,debugBelch("other=%2x ", stab[j].st_other ));
563 IF_DEBUG(linker,debugBelch("name=%s [%x]\n",
564 ehdrC + shdr[shdr[i].sh_link].sh_offset
565 + stab[j].st_name, stab[j].st_name ));
566 }
567 }
568
569 if (nsymtabs == 0) {
570 // Not having a symbol table is not in principle a problem.
571 // When an object file has no symbols then the 'strip' program
572 // typically will remove the symbol table entirely.
573 IF_DEBUG(linker,debugBelch(" no symbol tables (potentially, but not necessarily a problem)\n"));
574 }
575
576 return 1;
577 }
578
579 /* Figure out what kind of section it is. Logic derived from
580 Figure 1.14 ("Special Sections") of the ELF document
581 ("Portable Formats Specification, Version 1.1"). */
582 static SectionKind getSectionKind_ELF( Elf_Shdr *hdr, int *is_bss )
583 {
584 *is_bss = false;
585
586 if (hdr->sh_type == SHT_PROGBITS
587 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_EXECINSTR)) {
588 /* .text-style section */
589 return SECTIONKIND_CODE_OR_RODATA;
590 }
591
592 if (hdr->sh_type == SHT_PROGBITS
593 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
594 /* .data-style section */
595 return SECTIONKIND_RWDATA;
596 }
597
598 if (hdr->sh_type == SHT_PROGBITS
599 && (hdr->sh_flags & SHF_ALLOC) && !(hdr->sh_flags & SHF_WRITE)) {
600 /* .rodata-style section */
601 return SECTIONKIND_CODE_OR_RODATA;
602 }
603 #if defined(SHT_INIT_ARRAY)
604 if (hdr->sh_type == SHT_INIT_ARRAY
605 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
606 /* .init_array section */
607 return SECTIONKIND_INIT_ARRAY;
608 }
609 #endif /* not SHT_INIT_ARRAY */
610 if (hdr->sh_type == SHT_NOBITS
611 && (hdr->sh_flags & SHF_ALLOC) && (hdr->sh_flags & SHF_WRITE)) {
612 /* .bss-style section */
613 *is_bss = true;
614 return SECTIONKIND_RWDATA;
615 }
616
617 return SECTIONKIND_OTHER;
618 }
619
620 #if !defined(NEED_PLT)
621
622 static void *
623 mapObjectFileSection (int fd, Elf_Word offset, Elf_Word size,
624 void **mapped_start, StgWord *mapped_size,
625 StgWord *mapped_offset)
626 {
627 void *p;
628 size_t pageOffset, pageSize;
629
630 pageOffset = roundDownToPage(offset);
631 pageSize = roundUpToPage(offset-pageOffset+size);
632 p = mmapForLinker(pageSize, 0, fd, pageOffset);
633 if (p == NULL) return NULL;
634 *mapped_size = pageSize;
635 *mapped_offset = pageOffset;
636 *mapped_start = p;
637 return (void*)((StgWord)p + offset - pageOffset);
638 }
639 #endif
640
641 int
642 ocGetNames_ELF ( ObjectCode* oc )
643 {
644 Elf_Word i;
645 int result, fd = -1;
646
647 char* ehdrC = (char*)(oc->image);
648 Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
649
650 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
651 Section * sections;
652 #if defined(SHN_XINDEX)
653 Elf_Word* shndxTable = get_shndx_table(ehdr);
654 #endif
655 const Elf_Word shnum = elf_shnum(ehdr);
656
657 ASSERT(symhash != NULL);
658
659 sections = (Section*)stgCallocBytes(sizeof(Section), shnum,
660 "ocGetNames_ELF(sections)");
661 oc->sections = sections;
662 oc->n_sections = shnum;
663
664 if (oc->imageMapped) {
665 #if defined(openbsd_HOST_OS)
666 fd = open(oc->fileName, O_RDONLY, S_IRUSR);
667 #else
668 fd = open(oc->fileName, O_RDONLY);
669 #endif
670 if (fd == -1) {
671 errorBelch("loadObj: can't open %" PATH_FMT, oc->fileName);
672 return 0;
673 }
674 }
675
676 for (i = 0; i < shnum; i++) {
677 int is_bss = false;
678 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
679 SectionAlloc alloc = SECTION_NOMEM;
680 void *start = NULL, *mapped_start = NULL;
681 StgWord mapped_size = 0, mapped_offset = 0;
682 StgWord size = shdr[i].sh_size;
683 StgWord offset = shdr[i].sh_offset;
684 StgWord align = shdr[i].sh_addralign;
685
686 if (is_bss && size > 0) {
687 /* This is a non-empty .bss section. Allocate zeroed space for
688 it, and set its .sh_offset field such that
689 ehdrC + .sh_offset == addr_of_zeroed_space. */
690 #if defined(NEED_GOT) || RTS_LINKER_USE_MMAP
691 if (USE_CONTIGUOUS_MMAP || RtsFlags.MiscFlags.linkerAlwaysPic) {
692 /* The space for bss sections is already preallocated */
693 ASSERT(oc->bssBegin != NULL);
694 alloc = SECTION_NOMEM;
695 start =
696 oc->image + roundUpToAlign(oc->bssBegin - oc->image, align);
697 oc->bssBegin = (char*)start + size;
698 ASSERT(oc->bssBegin <= oc->bssEnd);
699 } else {
700 /* Use mmapForLinker to allocate .bss, otherwise the malloced
701 * address might be out of range for sections that are mmaped.
702 */
703 alloc = SECTION_MMAP;
704 start = mmapForLinker(size, MAP_ANONYMOUS, -1, 0);
705 mapped_start = start;
706 mapped_offset = 0;
707 mapped_size = roundUpToPage(size);
708 }
709 #else
710 alloc = SECTION_MALLOC;
711 start = stgCallocBytes(1, size, "ocGetNames_ELF(BSS)");
712 mapped_start = start;
713 #endif
714 /*
715 debugBelch("BSS section at 0x%x, size %d\n",
716 zspace, shdr[i].sh_size);
717 */
718 addSection(&sections[i], kind, alloc, start, size,
719 mapped_offset, mapped_start, mapped_size);
720
721 oc->sections[i].info->nstubs = 0;
722 oc->sections[i].info->stub_offset = NULL;
723 oc->sections[i].info->stub_size = 0;
724 oc->sections[i].info->stubs = NULL;
725 } else if (kind != SECTIONKIND_OTHER && size > 0) {
726
727 #if defined(NEED_PLT)
728 /* To support stubs next to sections, we will use the following
729 * layout:
730 *
731 * .--------------.
732 * | Section data |
733 * |--------------|
734 * | Stub space |
735 * '--------------'
736 *
737 * This ensures that the plt stubs are in range for the section data,
738 * Unless the section data exceeds the size for relative jump, in
739 * which case I wouldn't know how to solve this, without starting to
740 * break up the section itself.
741 */
742
743 unsigned nstubs = numberOfStubsForSection(oc, i);
744 unsigned stub_space = STUB_SIZE * nstubs;
745
746 void * mem = mmap(NULL, size+stub_space,
747 PROT_READ | PROT_WRITE | PROT_EXEC,
748 MAP_ANON | MAP_PRIVATE,
749 -1, 0);
750
751 if( mem == MAP_FAILED ) {
752 barf("failed to mmap allocated memory to load section %d. "
753 "errno = %d", i, errno);
754 }
755
756 /* copy only the image part over; we don't want to copy data
757 * into the stub part.
758 */
759 memcpy( mem, oc->image + offset, size );
760
761 alloc = SECTION_MMAP;
762
763 mapped_offset = 0;
764 mapped_size = roundUpToPage(size+stub_space);
765 start = mem;
766 mapped_start = mem;
767 #else
768 if (USE_CONTIGUOUS_MMAP || RtsFlags.MiscFlags.linkerAlwaysPic) {
769 // already mapped.
770 start = oc->image + offset;
771 alloc = SECTION_NOMEM;
772 }
773 // use the m32 allocator if either the image is not mapped
774 // (i.e. we cannot map the secions separately), or if the section
775 // size is small.
776 else if (!oc->imageMapped || size < getPageSize() / 3) {
777 start = m32_alloc(size, 8);
778 if (start == NULL) goto fail;
779 memcpy(start, oc->image + offset, size);
780 alloc = SECTION_M32;
781 } else {
782 start = mapObjectFileSection(fd, offset, size,
783 &mapped_start, &mapped_size,
784 &mapped_offset);
785 if (start == NULL) goto fail;
786 alloc = SECTION_MMAP;
787 }
788 #endif
789 addSection(&sections[i], kind, alloc, start, size,
790 mapped_offset, mapped_start, mapped_size);
791
792 #if defined(NEED_PLT)
793 oc->sections[i].info->nstubs = 0;
794 oc->sections[i].info->stub_offset = (uint8_t*)mem + size;
795 oc->sections[i].info->stub_size = stub_space;
796 oc->sections[i].info->stubs = NULL;
797 #else
798 oc->sections[i].info->nstubs = 0;
799 oc->sections[i].info->stub_offset = NULL;
800 oc->sections[i].info->stub_size = 0;
801 oc->sections[i].info->stubs = NULL;
802 #endif
803
804 addProddableBlock(oc, start, size);
805 } else {
806 addSection(&oc->sections[i], kind, alloc, oc->image+offset, size,
807 0, 0, 0);
808 oc->sections[i].info->nstubs = 0;
809 oc->sections[i].info->stub_offset = NULL;
810 oc->sections[i].info->stub_size = 0;
811 oc->sections[i].info->stubs = NULL;
812 }
813 oc->sections[i].info->name = oc->info->sectionHeaderStrtab
814 + shdr[i].sh_name;
815 oc->sections[i].info->sectionHeader = &shdr[i];
816
817
818
819
820 if (shdr[i].sh_type != SHT_SYMTAB) continue;
821
822 /* copy stuff into this module's object symbol table */
823
824 oc->n_symbols = 0;
825 for(ElfSymbolTable *symTab = oc->info->symbolTables;
826 symTab != NULL; symTab = symTab->next) {
827 oc->n_symbols += symTab->n_symbols;
828 }
829
830 oc->symbols = stgCallocBytes(oc->n_symbols, sizeof(Symbol_t),
831 "ocGetNames_ELF(oc->symbols)");
832 // Note calloc: if we fail partway through initializing symbols, we need
833 // to undo the additions to the symbol table so far. We know which ones
834 // have been added by whether the entry is NULL or not.
835
836 unsigned curSymbol = 0;
837
838 //TODO: we ignore local symbols anyway right? So we can use the
839 // shdr[i].sh_info to get the index of the first non-local symbol
840 // ie we should use j = shdr[i].sh_info
841 for(ElfSymbolTable *symTab = oc->info->symbolTables;
842 symTab != NULL; symTab = symTab->next) {
843 for (size_t j = 0; j < symTab->n_symbols; j++) {
844
845 char isLocal = false; /* avoids uninit-var warning */
846 HsBool isWeak = HS_BOOL_FALSE;
847 SymbolName *nm = symTab->symbols[j].name;
848 unsigned short shndx = symTab->symbols[j].elf_sym->st_shndx;
849
850 ElfSymbol *symbol = &symTab->symbols[j];
851
852 Elf_Word secno;
853
854
855 /* See Note [Many ELF Sections] */
856 /* Note that future checks for special SHN_* numbers should check
857 * the shndx variable, not the section number in secno. Sections
858 * with the real number in the SHN_LORESERVE..HIRESERVE range
859 * will have shndx SHN_XINDEX and a secno with one of the
860 * reserved values. */
861 secno = shndx;
862 #if defined(SHN_XINDEX)
863 if (shndx == SHN_XINDEX) {
864 ASSERT(shndxTable);
865 secno = shndxTable[j];
866 }
867 #endif
868 /* Figure out if we want to add it; if so, set ad to its
869 address. Otherwise leave ad == NULL. */
870
871 if (shndx == SHN_COMMON) {
872 isLocal = false;
873 symbol->addr = stgCallocBytes(1, symbol->elf_sym->st_size,
874 "ocGetNames_ELF(COMMON)");
875 /*
876 debugBelch("COMMON symbol, size %d name %s\n",
877 stab[j].st_size, nm);
878 */
879 /* Pointless to do addProddableBlock() for this area,
880 since the linker should never poke around in it. */
881 } else if ((ELF_ST_BIND(symbol->elf_sym->st_info) == STB_GLOBAL
882 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL
883 || ELF_ST_BIND(symbol->elf_sym->st_info) == STB_WEAK
884 )
885 /* and not an undefined symbol */
886 && shndx != SHN_UNDEF
887 /* and not in a "special section" */
888 && (shndx < SHN_LORESERVE
889 #if defined(SHN_XINDEX)
890 || shndx == SHN_XINDEX
891 #endif
892 )
893 &&
894 /* and it's a not a section or string table or
895 * anything silly */
896 (ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC
897 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_OBJECT
898 || ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_NOTYPE
899 )
900 ) {
901 /* Section 0 is the undefined section, hence > and not >=. */
902 ASSERT(secno > 0 && secno < shnum);
903 /*
904 if (shdr[secno].sh_type == SHT_NOBITS) {
905 debugBelch(" BSS symbol, size %d off %d name %s\n",
906 stab[j].st_size, stab[j].st_value, nm);
907 }
908 */
909 symbol->addr = (SymbolAddr*)(
910 (intptr_t) oc->sections[secno].start +
911 (intptr_t) symbol->elf_sym->st_value);
912
913 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
914 isLocal = true;
915 isWeak = false;
916 } else { /* STB_GLOBAL or STB_WEAK */
917 IF_DEBUG(linker,
918 debugBelch("addOTabName(GLOB): %10p %s %s\n",
919 symbol->addr, oc->fileName, nm));
920 isLocal = false;
921 isWeak = ELF_ST_BIND(symbol->elf_sym->st_info)
922 == STB_WEAK;
923 }
924 }
925
926 /* And the decision is ... */
927
928 if (symbol->addr != NULL) {
929 ASSERT(nm != NULL);
930 /* Acquire! */
931 if (!isLocal) {
932
933 if (isWeak == HS_BOOL_TRUE) {
934 setWeakSymbol(oc, nm);
935 }
936 if (!ghciInsertSymbolTable(oc->fileName, symhash,
937 nm, symbol->addr, isWeak, oc)
938 ) {
939 goto fail;
940 }
941 oc->symbols[curSymbol++].name = nm;
942 oc->symbols[curSymbol].addr = symbol->addr;
943 }
944 } else {
945 /* Skip. */
946 IF_DEBUG(linker,
947 debugBelch("skipping `%s'\n",
948 nm)
949 );
950
951 /*
952 debugBelch(
953 "skipping bind = %d, type = %d, secno = %d `%s'\n",
954 (int)ELF_ST_BIND(stab[j].st_info),
955 (int)ELF_ST_TYPE(stab[j].st_info),
956 (int)secno,
957 nm
958 );
959 */
960 }
961 }
962 }
963 }
964
965 #if defined(NEED_GOT)
966 if(makeGot( oc ))
967 errorBelch("Failed to create GOT for %s",
968 oc->archiveMemberName
969 ? oc->archiveMemberName
970 : oc->fileName);
971 #endif
972 result = 1;
973 goto end;
974
975 fail:
976 result = 0;
977 goto end;
978
979 end:
980 if (fd >= 0) close(fd);
981 return result;
982 }
983
984 // the aarch64 linker uses relocacteObjectCodeAarch64,
985 // see elf_reloc_aarch64.{h,c}
986 #if !defined(aarch64_HOST_ARCH)
987
988 /* Do ELF relocations which lack an explicit addend. All x86-linux
989 and arm-linux relocations appear to be of this form. */
990 static int
991 do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
992 Elf_Shdr* shdr, int shnum )
993 {
994 int j;
995
996 Elf_Word* targ;
997 Elf_Rel* rtab = (Elf_Rel*) (ehdrC + shdr[shnum].sh_offset);
998
999 int nent = shdr[shnum].sh_size / sizeof(Elf_Rel);
1000 int target_shndx = shdr[shnum].sh_info;
1001 int symtab_shndx = shdr[shnum].sh_link;
1002
1003 ElfSymbolTable *stab = NULL;
1004 for(ElfSymbolTable * st = oc->info->symbolTables;
1005 st != NULL; st = st->next) {
1006 if((int)st->index == symtab_shndx) {
1007 stab = st;
1008 break;
1009 }
1010 }
1011 ASSERT(stab != NULL);
1012
1013 targ = (Elf_Word*)oc->sections[target_shndx].start;
1014 IF_DEBUG(linker,debugBelch(
1015 "relocations for section %d using symtab %d\n",
1016 target_shndx, symtab_shndx));
1017
1018 /* Skip sections that we're not interested in. */
1019 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1020 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1021 return 1;
1022 }
1023
1024 for (j = 0; j < nent; j++) {
1025 Elf_Addr offset = rtab[j].r_offset;
1026 Elf_Addr info = rtab[j].r_info;
1027
1028 Elf_Addr P = ((Elf_Addr)targ) + offset;
1029 Elf_Word* pP = (Elf_Word*)P;
1030 #if defined(i386_HOST_ARCH) || defined(DEBUG)
1031 Elf_Addr A = *pP;
1032 #endif
1033 Elf_Addr S;
1034 void* S_tmp;
1035 #if defined(i386_HOST_ARCH)
1036 Elf_Addr value;
1037 #endif
1038 #if defined(arm_HOST_ARCH)
1039 int is_target_thm=0, T=0;
1040 #endif
1041
1042 ElfSymbol * symbol = NULL;
1043
1044 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p): ",
1045 j, (void*)offset, (void*)info ));
1046 if (!info) {
1047 IF_DEBUG(linker,debugBelch( " ZERO" ));
1048 S = 0;
1049 } else {
1050 symbol = &stab->symbols[ELF_R_SYM(info)];
1051 /* First see if it is a local symbol. */
1052 if (ELF_ST_BIND(symbol->elf_sym->st_info) == STB_LOCAL) {
1053 S = (Elf_Addr)symbol->addr;
1054 } else {
1055 S_tmp = lookupSymbol_( symbol->name );
1056 S = (Elf_Addr)S_tmp;
1057 }
1058 if (!S) {
1059 errorBelch("%s: unknown symbol `%s'",
1060 oc->fileName, symbol->name);
1061 return 0;
1062 }
1063 IF_DEBUG(linker,debugBelch( "`%s' resolves to %p\n", symbol->name,
1064 (void*)S ));
1065
1066 #if defined(arm_HOST_ARCH)
1067 /*
1068 * 4.5.3 Symbol Values
1069 *
1070 * In addition to the normal rules for symbol values the following
1071 * rules shall also apply to symbols of type STT_FUNC:
1072 * - If the symbol addresses an ARM instruction, its value is the
1073 * address of the instruction (in a relocatable object, the
1074 * offset of the instruction from the start of the section
1075 * containing it).
1076 * - If the symbol addresses a Thumb instruction, its value is the
1077 * address of the instruction with bit zero set (in a relocatable
1078 * object, the section offset with bit zero set).
1079 * - For the purposes of relocation the value used shall be the
1080 * address of the instruction (st_value & ~1).
1081 *
1082 * Note: This allows a linker to distinguish ARM and Thumb code
1083 * symbols without having to refer to the map. An ARM symbol
1084 * will always have an even value, while a Thumb symbol will
1085 * always have an odd value. However, a linker should strip
1086 * the discriminating bit from the value before using it for
1087 * relocation.
1088 *
1089 * (source: ELF for the ARM Architecture
1090 * ARM IHI 0044F, current through ABI release 2.10
1091 * 24th November 2015)
1092 */
1093 if(ELF_ST_TYPE(symbol->elf_sym->st_info) == STT_FUNC) {
1094 is_target_thm = S & 0x1;
1095 T = is_target_thm;
1096 S &= ~1;
1097 }
1098 #endif
1099 }
1100
1101 int reloc_type = ELF_R_TYPE(info);
1102 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p type=%d\n",
1103 (void*)P, (void*)S, (void*)A, reloc_type ));
1104 checkProddableBlock ( oc, pP, sizeof(Elf_Word) );
1105
1106 #if defined(i386_HOST_ARCH)
1107 value = S + A;
1108 #endif
1109
1110 switch (reloc_type) {
1111 # ifdef i386_HOST_ARCH
1112 case COMPAT_R_386_NONE: break;
1113 case COMPAT_R_386_32: *pP = value; break;
1114 case COMPAT_R_386_PC32: *pP = value - P; break;
1115 # endif
1116
1117 # ifdef arm_HOST_ARCH
1118 case COMPAT_R_ARM_ABS32:
1119 // Specified by Linux ARM ABI to be equivalent to ABS32
1120 case COMPAT_R_ARM_TARGET1:
1121 *(Elf32_Word *)P += S;
1122 *(Elf32_Word *)P |= T;
1123 break;
1124
1125 case COMPAT_R_ARM_REL32:
1126 *(Elf32_Word *)P += S;
1127 *(Elf32_Word *)P |= T;
1128 *(Elf32_Word *)P -= P;
1129 break;
1130
1131 case COMPAT_R_ARM_CALL:
1132 case COMPAT_R_ARM_JUMP24:
1133 {
1134 // N.B. LLVM's LLD linker's relocation implementation is a fantastic
1135 // resource
1136 StgWord32 *word = (StgWord32 *)P;
1137 StgInt32 imm = (*word & ((1<<24)-1)) << 2;
1138
1139 const StgBool is_blx = (*word & 0xf0000000) == 0xf0000000;
1140 const StgWord32 hBit = is_blx ? ((*word >> 24) & 1) : 0;
1141 imm |= hBit << 1;
1142
1143 // Sign extend to 32 bits
1144 // I would have thought this would be 24 bits but LLD uses 26 here.
1145 // Hmm.
1146 int32_t A = signExtend32(26, imm);
1147
1148 S = S + A; A = 0;
1149
1150 StgWord32 result = ((S + A) | T) - P;
1151
1152 const StgBool overflow = !isInt(26, (StgInt32) result);
1153 // Handle overflow and Thumb interworking
1154 const StgBool needs_veneer =
1155 (is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_JUMP24)
1156 || overflow;
1157
1158 if(needs_veneer) { /* overflow or thum interworking */
1159 // Note [PC bias]
1160 // From the ELF for the ARM Architecture documentation:
1161 // > 4.6.1.1 Addends and PC-bias compensation
1162 // > A binary file may use REL or RELA relocations or a mixture
1163 // > of the two (but multiple relocations for the same address
1164 // > must use only one type).
1165 // > If the relocation is pc-relative then compensation for the
1166 // > PC bias (the PC value is 8 bytes ahead of the executing
1167 // > instruction in ARM state and 4 bytes in Thumb state) must
1168 // > be encoded in the relocation by the object producer.
1169 int32_t bias = 8;
1170
1171 S += bias;
1172 /* try to locate an existing stub for this target */
1173 if(findStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1174 /* didn't find any. Need to create one */
1175 if(makeStub(&oc->sections[target_shndx], (void**)&S, 0)) {
1176 errorBelch("Unable to create veneer for ARM_CALL\n");
1177 return 0;
1178 }
1179 }
1180 S -= bias;
1181
1182 result = ((S + A) | T) - P;
1183 result &= ~1; // Clear thumb indicator bit
1184
1185 ASSERT(isInt(26, result)); /* X in range */
1186 }
1187
1188 // Update the branch target
1189 const StgWord32 imm24 = (result & 0x03fffffc) >> 2;
1190 *word = (*word & ~0x00ffffff)
1191 | (imm24 & 0x00ffffff);
1192
1193 // Change the relocated branch into a BLX if necessary
1194 const StgBool switch_mode =
1195 is_target_thm && (reloc_type == COMPAT_R_ARM_CALL);
1196 if (!needs_veneer && switch_mode) {
1197 const StgWord32 hBit = (result & 0x2) >> 1;
1198 // Change instruction to BLX
1199 *word = (*word & ~0xFF000000) | ((0xfa | hBit) << 24);
1200 IF_DEBUG(linker, debugBelch("Changed BL to BLX at %p\n", word));
1201 }
1202 break;
1203 }
1204
1205 case COMPAT_R_ARM_MOVT_ABS:
1206 case COMPAT_R_ARM_MOVW_ABS_NC:
1207 {
1208 StgWord32 *word = (StgWord32 *)P;
1209 StgWord32 imm12 = *word & 0xfff;
1210 StgWord32 imm4 = (*word >> 16) & 0xf;
1211 StgInt32 offset = imm4 << 12 | imm12;
1212 StgWord32 result = (S + offset) | T;
1213
1214 if (reloc_type == COMPAT_R_ARM_MOVT_ABS)
1215 result = (result & 0xffff0000) >> 16;
1216
1217 StgWord32 result12 = result & 0xfff;
1218 StgWord32 result4 = (result >> 12) & 0xf;
1219 *word = (*word & ~0xf0fff) | (result4 << 16) | result12;
1220 break;
1221 }
1222
1223 case COMPAT_R_ARM_THM_CALL:
1224 case COMPAT_R_ARM_THM_JUMP24:
1225 {
1226 StgWord16 *upper = (StgWord16 *)P;
1227 StgWord16 *lower = (StgWord16 *)(P + 2);
1228
1229 int overflow;
1230 int to_thm = (*lower >> 12) & 1;
1231 int sign = (*upper >> 10) & 1;
1232 int j1, j2, i1, i2;
1233
1234 // Decode immediate value
1235 j1 = (*lower >> 13) & 1; i1 = ~(j1 ^ sign) & 1;
1236 j2 = (*lower >> 11) & 1; i2 = ~(j2 ^ sign) & 1;
1237
1238 StgInt32 A = (sign << 24)
1239 | (i1 << 23)
1240 | (i2 << 22)
1241 | ((*upper & 0x03ff) << 12)
1242 | ((*lower & 0x07ff) << 1);
1243
1244 // Sign extend 25 to 32 bits
1245 if (A & 0x01000000)
1246 A -= 0x02000000;
1247
1248 S = S + A; A = 0;
1249
1250 offset = ((S + A) | T) - P;
1251 overflow = offset <= (StgWord32)0xff000000
1252 || offset >= (StgWord32)0x01000000;
1253
1254 if ((!is_target_thm && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_JUMP24)
1255 || overflow) {
1256 // Generate veneer
1257
1258 // see [PC bias] above.
1259 int32_t bias = 4;
1260 S += bias;
1261 // set the Thumb indicator to S, the final address should
1262 // carry the correct thumb indicator.
1263 S |= T;
1264 /* try to locate an existing stub for this target */
1265 if(findStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1266 /* didn't find any. Need to create one */
1267 if(makeStub(&oc->sections[target_shndx], (void**)&S, 1)) {
1268 errorBelch("Unable to create veneer for ARM_THM_CALL\n");
1269 return 0;
1270 }
1271 }
1272 S -= bias;
1273
1274 offset = ((S + A) | T) - P;
1275
1276 sign = offset >> 31;
1277 to_thm = 1;
1278 } else if (!is_target_thm
1279 && ELF_R_TYPE(info) == COMPAT_R_ARM_THM_CALL) {
1280 offset &= ~0x3;
1281 to_thm = 0;
1282 }
1283
1284 // Reencode instruction
1285 i1 = ~(offset >> 23) & 1; j1 = sign ^ i1;
1286 i2 = ~(offset >> 22) & 1; j2 = sign ^ i2;
1287 *upper = ( (*upper & 0xf800)
1288 | (sign << 10)
1289 | ((offset >> 12) & 0x03ff) );
1290 *lower = ( (*lower & 0xd000)
1291 | (j1 << 13)
1292 | (to_thm << 12)
1293 | (j2 << 11)
1294 | ((offset >> 1) & 0x07ff) );
1295 break;
1296 }
1297
1298 case COMPAT_R_ARM_THM_MOVT_ABS:
1299 case COMPAT_R_ARM_THM_MOVW_ABS_NC:
1300 {
1301 StgWord16 *upper = (StgWord16 *)P;
1302 StgWord16 *lower = (StgWord16 *)(P + 2);
1303 StgInt32 offset = ((*upper & 0x000f) << 12)
1304 | ((*upper & 0x0400) << 1)
1305 | ((*lower & 0x7000) >> 4)
1306 | (*lower & 0x00ff);
1307
1308 offset = (offset ^ 0x8000) - 0x8000; // Sign extend
1309 offset += S;
1310 if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVW_ABS_NC)
1311 offset |= T;
1312 else if (ELF_R_TYPE(info) == COMPAT_R_ARM_THM_MOVT_ABS)
1313 offset >>= 16;
1314
1315 *upper = ( (*upper & 0xfbf0)
1316 | ((offset & 0xf000) >> 12)
1317 | ((offset & 0x0800) >> 1) );
1318 *lower = ( (*lower & 0x8f00)
1319 | ((offset & 0x0700) << 4)
1320 | (offset & 0x00ff) );
1321 break;
1322 }
1323
1324 case COMPAT_R_ARM_THM_JUMP8:
1325 {
1326 StgWord16 *word = (StgWord16 *)P;
1327 StgWord offset = *word & 0x01fe;
1328 offset += S - P;
1329 if (!is_target_thm) {
1330 errorBelch("%s: Thumb to ARM transition with JUMP8 relocation "
1331 "not supported\n",
1332 oc->fileName);
1333 return 0;
1334 }
1335
1336 *word = (*word & ~0x01fe)
1337 | (offset & 0x01fe);
1338 break;
1339 }
1340
1341 case COMPAT_R_ARM_THM_JUMP11:
1342 {
1343 StgWord16 *word = (StgWord16 *)P;
1344 StgWord offset = *word & 0x0ffe;
1345 offset += S - P;
1346 if (!is_target_thm) {
1347 errorBelch("%s: Thumb to ARM transition with JUMP11 relocation "
1348 "not supported\n",
1349 oc->fileName);
1350 return 0;
1351 }
1352
1353 *word = (*word & ~0x0ffe)
1354 | (offset & 0x0ffe);
1355 break;
1356 }
1357 case COMPAT_R_ARM_GOT_PREL: {
1358 int32_t A = *pP;
1359 void* GOT_S = symbol->got_addr;
1360 ASSERT(GOT_S);
1361 *(uint32_t *)P = (uint32_t) GOT_S + A - P;
1362 break;
1363 }
1364 # endif // arm_HOST_ARCH
1365
1366 default:
1367 errorBelch("%s: unhandled ELF relocation(Rel) type %" FMT_Word "\n",
1368 oc->fileName, (W_)ELF_R_TYPE(info));
1369 return 0;
1370 }
1371
1372 }
1373 return 1;
1374 }
1375
1376 /* Do ELF relocations for which explicit addends are supplied.
1377 sparc-solaris relocations appear to be of this form. */
1378 static int
1379 do_Elf_Rela_relocations ( ObjectCode* oc, char* ehdrC,
1380 Elf_Shdr* shdr, int shnum )
1381 {
1382 int j;
1383 SymbolName* symbol = NULL;
1384 Elf_Rela* rtab = (Elf_Rela*) (ehdrC + shdr[shnum].sh_offset);
1385 Elf_Sym* stab;
1386 char* strtab;
1387 int nent = shdr[shnum].sh_size / sizeof(Elf_Rela);
1388 int symtab_shndx = shdr[shnum].sh_link;
1389 int strtab_shndx = shdr[symtab_shndx].sh_link;
1390 int target_shndx = shdr[shnum].sh_info;
1391 #if defined(SHN_XINDEX)
1392 Elf_Word* shndx_table = get_shndx_table((Elf_Ehdr*)ehdrC);
1393 #endif
1394 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1395 || defined(x86_64_HOST_ARCH)
1396 /* This #if def only serves to avoid unused-var warnings. */
1397 Elf_Addr targ = (Elf_Addr) oc->sections[target_shndx].start;
1398 #endif
1399
1400 stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
1401 strtab= (char*) (ehdrC + shdr[ strtab_shndx ].sh_offset);
1402
1403 IF_DEBUG(linker,debugBelch( "relocations for section %d using symtab %d\n",
1404 target_shndx, symtab_shndx ));
1405
1406 /* Skip sections that we're not interested in. */
1407 if (oc->sections[target_shndx].kind == SECTIONKIND_OTHER) {
1408 IF_DEBUG(linker,debugBelch( "skipping (target section not loaded)"));
1409 return 1;
1410 }
1411
1412 for (j = 0; j < nent; j++) {
1413 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1414 || defined(x86_64_HOST_ARCH)
1415 /* This #if def only serves to avoid unused-var warnings. */
1416 Elf_Addr offset = rtab[j].r_offset;
1417 Elf_Addr P = targ + offset;
1418 Elf_Addr A = rtab[j].r_addend;
1419 #endif
1420 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1421 || defined(x86_64_HOST_ARCH)
1422 Elf_Addr value;
1423 #endif
1424 Elf_Addr info = rtab[j].r_info;
1425 Elf_Addr S;
1426 void* S_tmp;
1427 # if defined(sparc_HOST_ARCH)
1428 Elf_Word* pP = (Elf_Word*)P;
1429 Elf_Word w1, w2;
1430 # elif defined(powerpc_HOST_ARCH)
1431 Elf_Sword delta;
1432 # endif
1433
1434 IF_DEBUG(linker,debugBelch( "Rel entry %3d is raw(%6p %6p %6p) ",
1435 j, (void*)offset, (void*)info,
1436 (void*)A ));
1437 if (!info) {
1438 IF_DEBUG(linker,debugBelch( " ZERO" ));
1439 S = 0;
1440 } else {
1441 Elf_Sym sym = stab[ELF_R_SYM(info)];
1442 /* First see if it is a local symbol. */
1443 if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
1444 /* Yes, so we can get the address directly from the ELF symbol
1445 table. */
1446 symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
1447 /* See Note [Many ELF Sections] */
1448 Elf_Word secno = sym.st_shndx;
1449 #if defined(SHN_XINDEX)
1450 if (secno == SHN_XINDEX) {
1451 secno = shndx_table[ELF_R_SYM(info)];
1452 }
1453 #endif
1454 S = (Elf_Addr)oc->sections[secno].start
1455 + stab[ELF_R_SYM(info)].st_value;
1456 } else {
1457 /* No, so look up the name in our global table. */
1458 symbol = strtab + sym.st_name;
1459 S_tmp = lookupSymbol_( symbol );
1460 S = (Elf_Addr)S_tmp;
1461 }
1462 if (!S) {
1463 errorBelch("%s: unknown symbol `%s'", oc->fileName, symbol);
1464 return 0;
1465 }
1466 IF_DEBUG(linker,debugBelch("`%s' resolves to %p\n", symbol, (void*)S));
1467 }
1468
1469 #if defined(DEBUG) || defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1470 || defined(x86_64_HOST_ARCH)
1471 IF_DEBUG(linker,debugBelch("Reloc: P = %p S = %p A = %p\n",
1472 (void*)P, (void*)S, (void*)A ));
1473 checkProddableBlock(oc, (void*)P, sizeof(Elf_Word));
1474 #endif
1475
1476 #if defined(sparc_HOST_ARCH) || defined(powerpc_HOST_ARCH) \
1477 || defined(x86_64_HOST_ARCH)
1478 value = S + A;
1479 #endif
1480
1481 switch (ELF_R_TYPE(info)) {
1482 # if defined(sparc_HOST_ARCH)
1483 case R_SPARC_WDISP30:
1484 w1 = *pP & 0xC0000000;
1485 w2 = (Elf_Word)((value - P) >> 2);
1486 ASSERT((w2 & 0xC0000000) == 0);
1487 w1 |= w2;
1488 *pP = w1;
1489 break;
1490 case R_SPARC_HI22:
1491 w1 = *pP & 0xFFC00000;
1492 w2 = (Elf_Word)(value >> 10);
1493 ASSERT((w2 & 0xFFC00000) == 0);
1494 w1 |= w2;
1495 *pP = w1;
1496 break;
1497 case R_SPARC_LO10:
1498 w1 = *pP & ~0x3FF;
1499 w2 = (Elf_Word)(value & 0x3FF);
1500 ASSERT((w2 & ~0x3FF) == 0);
1501 w1 |= w2;
1502 *pP = w1;
1503 break;
1504
1505 /* According to the Sun documentation:
1506 R_SPARC_UA32
1507 This relocation type resembles R_SPARC_32, except it refers to an
1508 unaligned word. That is, the word to be relocated must be treated
1509 as four separate bytes with arbitrary alignment, not as a word
1510 aligned according to the architecture requirements.
1511 */
1512 case R_SPARC_UA32:
1513 w2 = (Elf_Word)value;
1514
1515 // SPARC doesn't do misaligned writes of 32 bit words,
1516 // so we have to do this one byte-at-a-time.
1517 char *pPc = (char*)pP;
1518 pPc[0] = (char) ((Elf_Word)(w2 & 0xff000000) >> 24);
1519 pPc[1] = (char) ((Elf_Word)(w2 & 0x00ff0000) >> 16);
1520 pPc[2] = (char) ((Elf_Word)(w2 & 0x0000ff00) >> 8);
1521 pPc[3] = (char) ((Elf_Word)(w2 & 0x000000ff));
1522 break;
1523
1524 case R_SPARC_32:
1525 w2 = (Elf_Word)value;
1526 *pP = w2;
1527 break;
1528 # elif defined(powerpc_HOST_ARCH)
1529 case R_PPC_ADDR16_LO:
1530 *(Elf32_Half*) P = value;
1531 break;
1532
1533 case R_PPC_ADDR16_HI:
1534 *(Elf32_Half*) P = value >> 16;
1535 break;
1536
1537 case R_PPC_ADDR16_HA:
1538 *(Elf32_Half*) P = (value + 0x8000) >> 16;
1539 break;
1540
1541 case R_PPC_ADDR32:
1542 *(Elf32_Word *) P = value;
1543 break;
1544
1545 case R_PPC_REL32:
1546 *(Elf32_Word *) P = value - P;
1547 break;
1548
1549 case R_PPC_PLTREL24:
1550 value -= 0x8000; /* See Note [.LCTOC1 in PPC PIC code] */
1551 FALLTHROUGH;
1552 case R_PPC_REL24:
1553 delta = value - P;
1554
1555 if( delta << 6 >> 6 != delta )
1556 {
1557 value = (Elf_Addr)(&makeSymbolExtra( oc, ELF_R_SYM(info), value )
1558 ->jumpIsland);
1559 delta = value - P;
1560
1561 if( value == 0 || delta << 6 >> 6 != delta )
1562 {
1563 barf( "Unable to make SymbolExtra for #%d",
1564 ELF_R_SYM(info) );
1565 return 0;
1566 }
1567 }
1568
1569 *(Elf_Word *) P = (*(Elf_Word *) P & 0xfc000003)
1570 | (delta & 0x3fffffc);
1571 break;
1572
1573 case R_PPC_REL16_LO:
1574 *(Elf32_Half*) P = value - P;
1575 break;
1576
1577 case R_PPC_REL16_HI:
1578 *(Elf32_Half*) P = (value - P) >> 16;
1579 break;
1580
1581 case R_PPC_REL16_HA:
1582 *(Elf32_Half*) P = (value + 0x8000 - P) >> 16;
1583 break;
1584 # endif
1585
1586 #if defined(x86_64_HOST_ARCH)
1587 case COMPAT_R_X86_64_NONE:
1588 break;
1589
1590 case COMPAT_R_X86_64_64:
1591 {
1592 Elf64_Xword payload = value;
1593 memcpy((void*)P, &payload, sizeof(payload));
1594 break;
1595 }
1596
1597 case COMPAT_R_X86_64_PC32:
1598 {
1599 StgInt64 off = value - P;
1600 if (off != (Elf64_Sword)off && X86_64_ELF_NONPIC_HACK) {
1601 StgInt64 pltAddress =
1602 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1603 -> jumpIsland;
1604 off = pltAddress + A - P;
1605 }
1606 if (off != (Elf64_Sword)off) {
1607 errorBelch(
1608 "R_X86_64_PC32 relocation out of range: %s = %" PRIx64
1609 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1610 symbol, off, oc->fileName);
1611 return 0;
1612 }
1613 Elf64_Sword payload = off;
1614 memcpy((void*)P, &payload, sizeof(payload));
1615 break;
1616 }
1617
1618 case COMPAT_R_X86_64_PC64:
1619 {
1620 Elf64_Sxword payload = value - P;
1621 memcpy((void*)P, &payload, sizeof(payload));
1622 break;
1623 }
1624
1625 case COMPAT_R_X86_64_32:
1626 {
1627 if (value != (Elf64_Word)value && X86_64_ELF_NONPIC_HACK) {
1628 StgInt64 pltAddress =
1629 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1630 -> jumpIsland;
1631 value = pltAddress + A;
1632 }
1633 if (value != (Elf64_Word)value) {
1634 errorBelch(
1635 "R_X86_64_32 relocation out of range: %s = %" PRIx64
1636 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1637 symbol, value, oc->fileName);
1638 return 0;
1639 }
1640 Elf64_Word payload = value;
1641 memcpy((void*)P, &payload, sizeof(payload));
1642 break;
1643 }
1644
1645 case COMPAT_R_X86_64_32S:
1646 {
1647 if ((StgInt64)value != (Elf64_Sword)value && X86_64_ELF_NONPIC_HACK) {
1648 StgInt64 pltAddress =
1649 (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1650 -> jumpIsland;
1651 value = pltAddress + A;
1652 }
1653 if ((StgInt64)value != (Elf64_Sword)value) {
1654 errorBelch(
1655 "R_X86_64_32S relocation out of range: %s = %" PRIx64
1656 "\nRecompile %s with -fPIC -fexternal-dynamic-refs.",
1657 symbol, value, oc->fileName);
1658 return 0;
1659 }
1660 Elf64_Sword payload = value;
1661 memcpy((void*)P, &payload, sizeof(payload));
1662 break;
1663 }
1664 case COMPAT_R_X86_64_REX_GOTPCRELX:
1665 case COMPAT_R_X86_64_GOTPCRELX:
1666 case COMPAT_R_X86_64_GOTPCREL:
1667 {
1668 StgInt64 gotAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)->addr;
1669 StgInt64 off = gotAddress + A - P;
1670 if (off != (Elf64_Sword)off) {
1671 barf(
1672 "COMPAT_R_X86_64_GOTPCREL relocation out of range: "
1673 "%s = %" PRIx64 " in %s.",
1674 symbol, off, oc->fileName);
1675 }
1676 Elf64_Sword payload = off;
1677 memcpy((void*)P, &payload, sizeof(payload));
1678 break;
1679 }
1680 #if defined(dragonfly_HOST_OS)
1681 case COMPAT_R_X86_64_GOTTPOFF:
1682 {
1683 /* determine the offset of S to the current thread's tls
1684 area
1685 XXX: Move this to the beginning of function */
1686 struct tls_info ti;
1687 get_tls_area(0, &ti, sizeof(ti));
1688 /* make entry in GOT that contains said offset */
1689 StgInt64 gotEntry = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info),
1690 (S - (Elf64_Addr)(ti.base)))->addr;
1691 StgInt64 off = gotEntry + A - P;
1692 if (off != (Elf64_Sword)off) {
1693 barf(
1694 "COMPAT_R_X86_64_GOTTPOFF relocation out of range: "
1695 "%s = %" PRIx64 " in %s.",
1696 symbol, off, oc->fileName);
1697 }
1698 Elf64_SWord payload = off;
1699 memcpy((void*)P, &payload, sizeof(payload));
1700 break;
1701 }
1702 #endif
1703
1704 case COMPAT_R_X86_64_PLT32:
1705 {
1706 StgInt64 off = value - P;
1707 if (off != (Elf64_Sword)off) {
1708 StgInt64 pltAddress = (StgInt64) &makeSymbolExtra(oc, ELF_R_SYM(info), S)
1709 -> jumpIsland;
1710 off = pltAddress + A - P;
1711 }
1712 if (off != (Elf64_Sword)off) {
1713 barf(
1714 "R_X86_64_PLT32 relocation out of range: "
1715 "%s = %" PRIx64 " in %s.",
1716 symbol, off, oc->fileName);
1717 }
1718 Elf64_Sword payload = off;
1719 memcpy((void*)P, &payload, sizeof(payload));
1720 break;
1721 }
1722 #endif
1723
1724 default:
1725 barf("%s: unhandled ELF relocation(RelA) type %" FMT_Word "\n",
1726 oc->fileName, (W_)ELF_R_TYPE(info));
1727 return 0;
1728 }
1729
1730 }
1731 return 1;
1732 }
1733 #endif /* !aarch64_HOST_ARCH */
1734
1735
1736 int
1737 ocResolve_ELF ( ObjectCode* oc )
1738 {
1739 char* ehdrC = (char*)(oc->image);
1740 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1741 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1742 const Elf_Word shnum = elf_shnum(ehdr);
1743
1744 #if defined(SHN_XINDEX)
1745 Elf_Word* shndxTable = get_shndx_table(ehdr);
1746 #endif
1747
1748 /* resolve section symbols
1749 * these are special symbols that point to sections, and have no name.
1750 * Usually there should be one symbol for each text and data section.
1751 *
1752 * We need to resolve (assign addresses) to them, to be able to use them
1753 * during relocation.
1754 */
1755 for(ElfSymbolTable *symTab = oc->info->symbolTables;
1756 symTab != NULL; symTab = symTab->next) {
1757 for (size_t i = 0; i < symTab->n_symbols; i++) {
1758 ElfSymbol *symbol = &symTab->symbols[i];
1759 if(STT_SECTION == ELF_ST_TYPE(symbol->elf_sym->st_info)) {
1760 /* NOTE: We assume that oc->sections corresponds to the
1761 * sections in the object file. This is currently true,
1762 * and will stay true, unless we start to compress
1763 * oc->sections by not having an entry for sections we
1764 * are not interested in.
1765 */
1766
1767
1768 /* See Note [Many ELF Sections] */
1769 /* Note that future checks for special SHN_* numbers should
1770 * check the shndx variable, not the section number in secno.
1771 * Sections with the real number in the SHN_LORESERVE..HIRESERVE
1772 * range will have shndx SHN_XINDEX and a secno with one of the
1773 * reserved values.
1774 */
1775 Elf_Word secno = symbol->elf_sym->st_shndx;
1776 #if defined(SHN_XINDEX)
1777 if (secno == SHN_XINDEX) {
1778 ASSERT(shndxTable);
1779 secno = shndxTable[i];
1780 }
1781 #endif
1782 ASSERT(symbol->elf_sym->st_name == 0);
1783 ASSERT(symbol->elf_sym->st_value == 0);
1784 symbol->addr = oc->sections[ secno ].start;
1785 }
1786 }
1787 }
1788
1789 #if defined(NEED_GOT)
1790 if(fillGot( oc ))
1791 return 0;
1792 /* silence warnings */
1793 (void) shnum;
1794 (void) shdr;
1795 #endif /* NEED_GOT */
1796
1797 #if defined(aarch64_HOST_ARCH)
1798 /* use new relocation design */
1799 if(relocateObjectCode( oc ))
1800 return 0;
1801 #else
1802 /* Process the relocation sections. */
1803 for (Elf_Word i = 0; i < shnum; i++) {
1804 if (shdr[i].sh_type == SHT_REL) {
1805 bool ok = do_Elf_Rel_relocations ( oc, ehdrC, shdr, i );
1806 if (!ok)
1807 return ok;
1808 }
1809 else
1810 if (shdr[i].sh_type == SHT_RELA) {
1811 bool ok = do_Elf_Rela_relocations ( oc, ehdrC, shdr, i );
1812 if (!ok)
1813 return ok;
1814 }
1815 }
1816 #endif
1817
1818 #if defined(powerpc_HOST_ARCH)
1819 ocFlushInstructionCache( oc );
1820 #endif
1821
1822 return 1;
1823 }
1824
1825 int ocRunInit_ELF( ObjectCode *oc )
1826 {
1827 Elf_Word i;
1828 char* ehdrC = (char*)(oc->image);
1829 Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
1830 Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
1831 char* sh_strtab = ehdrC + shdr[elf_shstrndx(ehdr)].sh_offset;
1832 int argc, envc;
1833 char **argv, **envv;
1834
1835 getProgArgv(&argc, &argv);
1836 getProgEnvv(&envc, &envv);
1837
1838 // XXX Apparently in some archs .init may be something
1839 // special! See DL_DT_INIT_ADDRESS macro in glibc
1840 // as well as ELF_FUNCTION_PTR_IS_SPECIAL. We've not handled
1841 // it here, please file a bug report if it affects you.
1842 for (i = 0; i < elf_shnum(ehdr); i++) {
1843 init_t *init_start, *init_end, *init;
1844 int is_bss = false;
1845 SectionKind kind = getSectionKind_ELF(&shdr[i], &is_bss);
1846 if (kind == SECTIONKIND_CODE_OR_RODATA
1847 && 0 == memcmp(".init", sh_strtab + shdr[i].sh_name, 5)) {
1848 init_t init_f = (init_t)(oc->sections[i].start);
1849 init_f(argc, argv, envv);
1850 }
1851
1852 if (kind == SECTIONKIND_INIT_ARRAY) {
1853 char *init_startC = oc->sections[i].start;
1854 init_start = (init_t*)init_startC;
1855 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1856 for (init = init_start; init < init_end; init++) {
1857 (*init)(argc, argv, envv);
1858 }
1859 }
1860
1861 // XXX could be more strict and assert that it's
1862 // SECTIONKIND_RWDATA; but allowing RODATA seems harmless enough.
1863 if ((kind == SECTIONKIND_RWDATA || kind == SECTIONKIND_CODE_OR_RODATA)
1864 && 0 == memcmp(".ctors", sh_strtab + shdr[i].sh_name, 6)) {
1865 char *init_startC = oc->sections[i].start;
1866 init_start = (init_t*)init_startC;
1867 init_end = (init_t*)(init_startC + shdr[i].sh_size);
1868 // ctors run in reverse
1869 for (init = init_end - 1; init >= init_start; init--) {
1870 (*init)(argc, argv, envv);
1871 }
1872 }
1873 }
1874
1875 freeProgEnvv(envc, envv);
1876 return 1;
1877 }
1878
1879 /*
1880 * PowerPC & X86_64 ELF specifics
1881 */
1882
1883 #if defined(NEED_SYMBOL_EXTRAS)
1884
1885 int ocAllocateExtras_ELF( ObjectCode *oc )
1886 {
1887 Elf_Ehdr *ehdr = (Elf_Ehdr *) oc->image;
1888 Elf_Shdr* shdr = (Elf_Shdr *) ( ((char *)oc->image) + ehdr->e_shoff );
1889 Elf_Shdr* symtab = NULL;
1890 Elf_Word shnum = elf_shnum(ehdr);
1891 int bssSize = 0;
1892
1893 for (Elf_Word i = 0; i < shnum; ++i) {
1894 if(shdr[i].sh_type == SHT_SYMTAB) {
1895 symtab = &shdr[i];
1896 } else {
1897 int isBss = 0;
1898 getSectionKind_ELF(&shdr[i], &isBss);
1899 if (isBss && shdr[i].sh_size > 0) {
1900 bssSize += roundUpToAlign(shdr[i].sh_size, shdr[i].sh_addralign);
1901 }
1902 }
1903 }
1904
1905 if (symtab == NULL)
1906 {
1907 // Not having a symbol table is not in principle a problem.
1908 // When an object file has no symbols then the 'strip' program
1909 // typically will remove the symbol table entirely.
1910 IF_DEBUG(linker, debugBelch( "The ELF file %s contains no symtab\n",
1911 oc->archiveMemberName ? oc->archiveMemberName : oc->fileName ));
1912 return 1;
1913 }
1914
1915 if( symtab->sh_entsize != sizeof( Elf_Sym ) )
1916 {
1917 errorBelch( "The entry size (%d) of the symtab isn't %d\n",
1918 (int) symtab->sh_entsize, (int) sizeof( Elf_Sym ) );
1919
1920 return 0;
1921 }
1922
1923 return ocAllocateExtras(oc, symtab->sh_size / sizeof( Elf_Sym ), 0, bssSize);
1924 }
1925
1926 #endif /* NEED_SYMBOL_EXTRAS */
1927
1928 #endif /* elf */