6c00597764a877f2a0dabcacf50d94b26199127d
[ghc.git] / includes / CodeGen.Platform.hs
1
2 import CmmExpr
3 #if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
4 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc))
5 import Panic
6 #endif
7 import Reg
8
9 #include "ghcautoconf.h"
10 #include "stg/MachRegs.h"
11
12 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
13
14 # if defined(MACHREGS_i386)
15 # define eax 0
16 # define ebx 1
17 # define ecx 2
18 # define edx 3
19 # define esi 4
20 # define edi 5
21 # define ebp 6
22 # define esp 7
23 # endif
24
25 # if defined(MACHREGS_x86_64)
26 # define rax 0
27 # define rbx 1
28 # define rcx 2
29 # define rdx 3
30 # define rsi 4
31 # define rdi 5
32 # define rbp 6
33 # define rsp 7
34 # define r8 8
35 # define r9 9
36 # define r10 10
37 # define r11 11
38 # define r12 12
39 # define r13 13
40 # define r14 14
41 # define r15 15
42 # endif
43
44 # define fake0 16
45 # define fake1 17
46 # define fake2 18
47 # define fake3 19
48 # define fake4 20
49 # define fake5 21
50
51 -- N.B. XMM, YMM, and ZMM are all aliased to the same hardware registers hence
52 -- being assigned the same RegNos.
53 # define xmm0 24
54 # define xmm1 25
55 # define xmm2 26
56 # define xmm3 27
57 # define xmm4 28
58 # define xmm5 29
59 # define xmm6 30
60 # define xmm7 31
61 # define xmm8 32
62 # define xmm9 33
63 # define xmm10 34
64 # define xmm11 35
65 # define xmm12 36
66 # define xmm13 37
67 # define xmm14 38
68 # define xmm15 39
69
70 # define ymm0 24
71 # define ymm1 25
72 # define ymm2 26
73 # define ymm3 27
74 # define ymm4 28
75 # define ymm5 29
76 # define ymm6 30
77 # define ymm7 31
78 # define ymm8 32
79 # define ymm9 33
80 # define ymm10 34
81 # define ymm11 35
82 # define ymm12 36
83 # define ymm13 37
84 # define ymm14 38
85 # define ymm15 39
86
87 # define zmm0 24
88 # define zmm1 25
89 # define zmm2 26
90 # define zmm3 27
91 # define zmm4 28
92 # define zmm5 29
93 # define zmm6 30
94 # define zmm7 31
95 # define zmm8 32
96 # define zmm9 33
97 # define zmm10 34
98 # define zmm11 35
99 # define zmm12 36
100 # define zmm13 37
101 # define zmm14 38
102 # define zmm15 39
103
104 -- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs.
105 -- Since it's only used to check 'isJust', the actual values don't matter, thus
106 -- I'm not sure if these are the correct numberings.
107 -- Normally, the register names are just stringified as part of the REG() macro
108
109 #elif defined(MACHREGS_powerpc) || defined(MACHREGS_arm) \
110 || defined(MACHREGS_aarch64)
111
112 # define r0 0
113 # define r1 1
114 # define r2 2
115 # define r3 3
116 # define r4 4
117 # define r5 5
118 # define r6 6
119 # define r7 7
120 # define r8 8
121 # define r9 9
122 # define r10 10
123 # define r11 11
124 # define r12 12
125 # define r13 13
126 # define r14 14
127 # define r15 15
128 # define r16 16
129 # define r17 17
130 # define r18 18
131 # define r19 19
132 # define r20 20
133 # define r21 21
134 # define r22 22
135 # define r23 23
136 # define r24 24
137 # define r25 25
138 # define r26 26
139 # define r27 27
140 # define r28 28
141 # define r29 29
142 # define r30 30
143 # define r31 31
144
145 -- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe
146 -- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG.
147 #if defined(MACHREGS_aarch64) || defined(MACHREGS_arm)
148 # define s0 32
149 # define s1 33
150 # define s2 34
151 # define s3 35
152 # define s4 36
153 # define s5 37
154 # define s6 38
155 # define s7 39
156 # define s8 40
157 # define s9 41
158 # define s10 42
159 # define s11 43
160 # define s12 44
161 # define s13 45
162 # define s14 46
163 # define s15 47
164 # define s16 48
165 # define s17 49
166 # define s18 50
167 # define s19 51
168 # define s20 52
169 # define s21 53
170 # define s22 54
171 # define s23 55
172 # define s24 56
173 # define s25 57
174 # define s26 58
175 # define s27 59
176 # define s28 60
177 # define s29 61
178 # define s30 62
179 # define s31 63
180
181 # define d0 32
182 # define d1 33
183 # define d2 34
184 # define d3 35
185 # define d4 36
186 # define d5 37
187 # define d6 38
188 # define d7 39
189 # define d8 40
190 # define d9 41
191 # define d10 42
192 # define d11 43
193 # define d12 44
194 # define d13 45
195 # define d14 46
196 # define d15 47
197 # define d16 48
198 # define d17 49
199 # define d18 50
200 # define d19 51
201 # define d20 52
202 # define d21 53
203 # define d22 54
204 # define d23 55
205 # define d24 56
206 # define d25 57
207 # define d26 58
208 # define d27 59
209 # define d28 60
210 # define d29 61
211 # define d30 62
212 # define d31 63
213 #endif
214
215 # if defined(MACHREGS_darwin)
216 # define f0 32
217 # define f1 33
218 # define f2 34
219 # define f3 35
220 # define f4 36
221 # define f5 37
222 # define f6 38
223 # define f7 39
224 # define f8 40
225 # define f9 41
226 # define f10 42
227 # define f11 43
228 # define f12 44
229 # define f13 45
230 # define f14 46
231 # define f15 47
232 # define f16 48
233 # define f17 49
234 # define f18 50
235 # define f19 51
236 # define f20 52
237 # define f21 53
238 # define f22 54
239 # define f23 55
240 # define f24 56
241 # define f25 57
242 # define f26 58
243 # define f27 59
244 # define f28 60
245 # define f29 61
246 # define f30 62
247 # define f31 63
248 # else
249 # define fr0 32
250 # define fr1 33
251 # define fr2 34
252 # define fr3 35
253 # define fr4 36
254 # define fr5 37
255 # define fr6 38
256 # define fr7 39
257 # define fr8 40
258 # define fr9 41
259 # define fr10 42
260 # define fr11 43
261 # define fr12 44
262 # define fr13 45
263 # define fr14 46
264 # define fr15 47
265 # define fr16 48
266 # define fr17 49
267 # define fr18 50
268 # define fr19 51
269 # define fr20 52
270 # define fr21 53
271 # define fr22 54
272 # define fr23 55
273 # define fr24 56
274 # define fr25 57
275 # define fr26 58
276 # define fr27 59
277 # define fr28 60
278 # define fr29 61
279 # define fr30 62
280 # define fr31 63
281 # endif
282
283 #elif defined(MACHREGS_sparc)
284
285 # define g0 0
286 # define g1 1
287 # define g2 2
288 # define g3 3
289 # define g4 4
290 # define g5 5
291 # define g6 6
292 # define g7 7
293
294 # define o0 8
295 # define o1 9
296 # define o2 10
297 # define o3 11
298 # define o4 12
299 # define o5 13
300 # define o6 14
301 # define o7 15
302
303 # define l0 16
304 # define l1 17
305 # define l2 18
306 # define l3 19
307 # define l4 20
308 # define l5 21
309 # define l6 22
310 # define l7 23
311
312 # define i0 24
313 # define i1 25
314 # define i2 26
315 # define i3 27
316 # define i4 28
317 # define i5 29
318 # define i6 30
319 # define i7 31
320
321 # define f0 32
322 # define f1 33
323 # define f2 34
324 # define f3 35
325 # define f4 36
326 # define f5 37
327 # define f6 38
328 # define f7 39
329 # define f8 40
330 # define f9 41
331 # define f10 42
332 # define f11 43
333 # define f12 44
334 # define f13 45
335 # define f14 46
336 # define f15 47
337 # define f16 48
338 # define f17 49
339 # define f18 50
340 # define f19 51
341 # define f20 52
342 # define f21 53
343 # define f22 54
344 # define f23 55
345 # define f24 56
346 # define f25 57
347 # define f26 58
348 # define f27 59
349 # define f28 60
350 # define f29 61
351 # define f30 62
352 # define f31 63
353
354 #endif
355
356 callerSaves :: GlobalReg -> Bool
357 #if defined(CALLER_SAVES_Base)
358 callerSaves BaseReg = True
359 #endif
360 #if defined(CALLER_SAVES_R1)
361 callerSaves (VanillaReg 1 _) = True
362 #endif
363 #if defined(CALLER_SAVES_R2)
364 callerSaves (VanillaReg 2 _) = True
365 #endif
366 #if defined(CALLER_SAVES_R3)
367 callerSaves (VanillaReg 3 _) = True
368 #endif
369 #if defined(CALLER_SAVES_R4)
370 callerSaves (VanillaReg 4 _) = True
371 #endif
372 #if defined(CALLER_SAVES_R5)
373 callerSaves (VanillaReg 5 _) = True
374 #endif
375 #if defined(CALLER_SAVES_R6)
376 callerSaves (VanillaReg 6 _) = True
377 #endif
378 #if defined(CALLER_SAVES_R7)
379 callerSaves (VanillaReg 7 _) = True
380 #endif
381 #if defined(CALLER_SAVES_R8)
382 callerSaves (VanillaReg 8 _) = True
383 #endif
384 #if defined(CALLER_SAVES_R9)
385 callerSaves (VanillaReg 9 _) = True
386 #endif
387 #if defined(CALLER_SAVES_R10)
388 callerSaves (VanillaReg 10 _) = True
389 #endif
390 #if defined(CALLER_SAVES_F1)
391 callerSaves (FloatReg 1) = True
392 #endif
393 #if defined(CALLER_SAVES_F2)
394 callerSaves (FloatReg 2) = True
395 #endif
396 #if defined(CALLER_SAVES_F3)
397 callerSaves (FloatReg 3) = True
398 #endif
399 #if defined(CALLER_SAVES_F4)
400 callerSaves (FloatReg 4) = True
401 #endif
402 #if defined(CALLER_SAVES_F5)
403 callerSaves (FloatReg 5) = True
404 #endif
405 #if defined(CALLER_SAVES_F6)
406 callerSaves (FloatReg 6) = True
407 #endif
408 #if defined(CALLER_SAVES_D1)
409 callerSaves (DoubleReg 1) = True
410 #endif
411 #if defined(CALLER_SAVES_D2)
412 callerSaves (DoubleReg 2) = True
413 #endif
414 #if defined(CALLER_SAVES_D3)
415 callerSaves (DoubleReg 3) = True
416 #endif
417 #if defined(CALLER_SAVES_D4)
418 callerSaves (DoubleReg 4) = True
419 #endif
420 #if defined(CALLER_SAVES_D5)
421 callerSaves (DoubleReg 5) = True
422 #endif
423 #if defined(CALLER_SAVES_D6)
424 callerSaves (DoubleReg 6) = True
425 #endif
426 #if defined(CALLER_SAVES_L1)
427 callerSaves (LongReg 1) = True
428 #endif
429 #if defined(CALLER_SAVES_Sp)
430 callerSaves Sp = True
431 #endif
432 #if defined(CALLER_SAVES_SpLim)
433 callerSaves SpLim = True
434 #endif
435 #if defined(CALLER_SAVES_Hp)
436 callerSaves Hp = True
437 #endif
438 #if defined(CALLER_SAVES_HpLim)
439 callerSaves HpLim = True
440 #endif
441 #if defined(CALLER_SAVES_CCCS)
442 callerSaves CCCS = True
443 #endif
444 #if defined(CALLER_SAVES_CurrentTSO)
445 callerSaves CurrentTSO = True
446 #endif
447 #if defined(CALLER_SAVES_CurrentNursery)
448 callerSaves CurrentNursery = True
449 #endif
450 callerSaves _ = False
451
452 activeStgRegs :: [GlobalReg]
453 activeStgRegs = [
454 #if defined(REG_Base)
455 BaseReg
456 #endif
457 #if defined(REG_Sp)
458 ,Sp
459 #endif
460 #if defined(REG_Hp)
461 ,Hp
462 #endif
463 #if defined(REG_R1)
464 ,VanillaReg 1 VGcPtr
465 #endif
466 #if defined(REG_R2)
467 ,VanillaReg 2 VGcPtr
468 #endif
469 #if defined(REG_R3)
470 ,VanillaReg 3 VGcPtr
471 #endif
472 #if defined(REG_R4)
473 ,VanillaReg 4 VGcPtr
474 #endif
475 #if defined(REG_R5)
476 ,VanillaReg 5 VGcPtr
477 #endif
478 #if defined(REG_R6)
479 ,VanillaReg 6 VGcPtr
480 #endif
481 #if defined(REG_R7)
482 ,VanillaReg 7 VGcPtr
483 #endif
484 #if defined(REG_R8)
485 ,VanillaReg 8 VGcPtr
486 #endif
487 #if defined(REG_R9)
488 ,VanillaReg 9 VGcPtr
489 #endif
490 #if defined(REG_R10)
491 ,VanillaReg 10 VGcPtr
492 #endif
493 #if defined(REG_SpLim)
494 ,SpLim
495 #endif
496 #if MAX_REAL_XMM_REG != 0
497 #if defined(REG_F1)
498 ,FloatReg 1
499 #endif
500 #if defined(REG_D1)
501 ,DoubleReg 1
502 #endif
503 #if defined(REG_XMM1)
504 ,XmmReg 1
505 #endif
506 #if defined(REG_YMM1)
507 ,YmmReg 1
508 #endif
509 #if defined(REG_ZMM1)
510 ,ZmmReg 1
511 #endif
512 #if defined(REG_F2)
513 ,FloatReg 2
514 #endif
515 #if defined(REG_D2)
516 ,DoubleReg 2
517 #endif
518 #if defined(REG_XMM2)
519 ,XmmReg 2
520 #endif
521 #if defined(REG_YMM2)
522 ,YmmReg 2
523 #endif
524 #if defined(REG_ZMM2)
525 ,ZmmReg 2
526 #endif
527 #if defined(REG_F3)
528 ,FloatReg 3
529 #endif
530 #if defined(REG_D3)
531 ,DoubleReg 3
532 #endif
533 #if defined(REG_XMM3)
534 ,XmmReg 3
535 #endif
536 #if defined(REG_YMM3)
537 ,YmmReg 3
538 #endif
539 #if defined(REG_ZMM3)
540 ,ZmmReg 3
541 #endif
542 #if defined(REG_F4)
543 ,FloatReg 4
544 #endif
545 #if defined(REG_D4)
546 ,DoubleReg 4
547 #endif
548 #if defined(REG_XMM4)
549 ,XmmReg 4
550 #endif
551 #if defined(REG_YMM4)
552 ,YmmReg 4
553 #endif
554 #if defined(REG_ZMM4)
555 ,ZmmReg 4
556 #endif
557 #if defined(REG_F5)
558 ,FloatReg 5
559 #endif
560 #if defined(REG_D5)
561 ,DoubleReg 5
562 #endif
563 #if defined(REG_XMM5)
564 ,XmmReg 5
565 #endif
566 #if defined(REG_YMM5)
567 ,YmmReg 5
568 #endif
569 #if defined(REG_ZMM5)
570 ,ZmmReg 5
571 #endif
572 #if defined(REG_F6)
573 ,FloatReg 6
574 #endif
575 #if defined(REG_D6)
576 ,DoubleReg 6
577 #endif
578 #if defined(REG_XMM6)
579 ,XmmReg 6
580 #endif
581 #if defined(REG_YMM6)
582 ,YmmReg 6
583 #endif
584 #if defined(REG_ZMM6)
585 ,ZmmReg 6
586 #endif
587 #else /* MAX_REAL_XMM_REG == 0 */
588 #if defined(REG_F1)
589 ,FloatReg 1
590 #endif
591 #if defined(REG_F2)
592 ,FloatReg 2
593 #endif
594 #if defined(REG_F3)
595 ,FloatReg 3
596 #endif
597 #if defined(REG_F4)
598 ,FloatReg 4
599 #endif
600 #if defined(REG_F5)
601 ,FloatReg 5
602 #endif
603 #if defined(REG_F6)
604 ,FloatReg 6
605 #endif
606 #if defined(REG_D1)
607 ,DoubleReg 1
608 #endif
609 #if defined(REG_D2)
610 ,DoubleReg 2
611 #endif
612 #if defined(REG_D3)
613 ,DoubleReg 3
614 #endif
615 #if defined(REG_D4)
616 ,DoubleReg 4
617 #endif
618 #if defined(REG_D5)
619 ,DoubleReg 5
620 #endif
621 #if defined(REG_D6)
622 ,DoubleReg 6
623 #endif
624 #endif /* MAX_REAL_XMM_REG == 0 */
625 ]
626
627 haveRegBase :: Bool
628 #if defined(REG_Base)
629 haveRegBase = True
630 #else
631 haveRegBase = False
632 #endif
633
634 -- | Returns 'Nothing' if this global register is not stored
635 -- in a real machine register, otherwise returns @'Just' reg@, where
636 -- reg is the machine register it is stored in.
637 globalRegMaybe :: GlobalReg -> Maybe RealReg
638 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
639 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \
640 || defined(MACHREGS_arm) || defined(MACHREGS_aarch64)
641 # if defined(REG_Base)
642 globalRegMaybe BaseReg = Just (RealRegSingle REG_Base)
643 # endif
644 # if defined(REG_R1)
645 globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1)
646 # endif
647 # if defined(REG_R2)
648 globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2)
649 # endif
650 # if defined(REG_R3)
651 globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3)
652 # endif
653 # if defined(REG_R4)
654 globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4)
655 # endif
656 # if defined(REG_R5)
657 globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5)
658 # endif
659 # if defined(REG_R6)
660 globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6)
661 # endif
662 # if defined(REG_R7)
663 globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7)
664 # endif
665 # if defined(REG_R8)
666 globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8)
667 # endif
668 # if defined(REG_R9)
669 globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9)
670 # endif
671 # if defined(REG_R10)
672 globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10)
673 # endif
674 # if defined(REG_F1)
675 globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1)
676 # endif
677 # if defined(REG_F2)
678 globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2)
679 # endif
680 # if defined(REG_F3)
681 globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3)
682 # endif
683 # if defined(REG_F4)
684 globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4)
685 # endif
686 # if defined(REG_F5)
687 globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5)
688 # endif
689 # if defined(REG_F6)
690 globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6)
691 # endif
692 # if defined(REG_D1)
693 globalRegMaybe (DoubleReg 1) =
694 # if defined(MACHREGS_sparc)
695 Just (RealRegPair REG_D1 (REG_D1 + 1))
696 # else
697 Just (RealRegSingle REG_D1)
698 # endif
699 # endif
700 # if defined(REG_D2)
701 globalRegMaybe (DoubleReg 2) =
702 # if defined(MACHREGS_sparc)
703 Just (RealRegPair REG_D2 (REG_D2 + 1))
704 # else
705 Just (RealRegSingle REG_D2)
706 # endif
707 # endif
708 # if defined(REG_D3)
709 globalRegMaybe (DoubleReg 3) =
710 # if defined(MACHREGS_sparc)
711 Just (RealRegPair REG_D3 (REG_D3 + 1))
712 # else
713 Just (RealRegSingle REG_D3)
714 # endif
715 # endif
716 # if defined(REG_D4)
717 globalRegMaybe (DoubleReg 4) =
718 # if defined(MACHREGS_sparc)
719 Just (RealRegPair REG_D4 (REG_D4 + 1))
720 # else
721 Just (RealRegSingle REG_D4)
722 # endif
723 # endif
724 # if defined(REG_D5)
725 globalRegMaybe (DoubleReg 5) =
726 # if defined(MACHREGS_sparc)
727 Just (RealRegPair REG_D5 (REG_D5 + 1))
728 # else
729 Just (RealRegSingle REG_D5)
730 # endif
731 # endif
732 # if defined(REG_D6)
733 globalRegMaybe (DoubleReg 6) =
734 # if defined(MACHREGS_sparc)
735 Just (RealRegPair REG_D6 (REG_D6 + 1))
736 # else
737 Just (RealRegSingle REG_D6)
738 # endif
739 # endif
740 # if MAX_REAL_XMM_REG != 0
741 # if defined(REG_XMM1)
742 globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1)
743 # endif
744 # if defined(REG_XMM2)
745 globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2)
746 # endif
747 # if defined(REG_XMM3)
748 globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3)
749 # endif
750 # if defined(REG_XMM4)
751 globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4)
752 # endif
753 # if defined(REG_XMM5)
754 globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5)
755 # endif
756 # if defined(REG_XMM6)
757 globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6)
758 # endif
759 # endif
760 # if defined(MAX_REAL_YMM_REG) && MAX_REAL_YMM_REG != 0
761 # if defined(REG_YMM1)
762 globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1)
763 # endif
764 # if defined(REG_YMM2)
765 globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2)
766 # endif
767 # if defined(REG_YMM3)
768 globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3)
769 # endif
770 # if defined(REG_YMM4)
771 globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4)
772 # endif
773 # if defined(REG_YMM5)
774 globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5)
775 # endif
776 # if defined(REG_YMM6)
777 globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6)
778 # endif
779 # endif
780 # if defined(MAX_REAL_ZMM_REG) && MAX_REAL_ZMM_REG != 0
781 # if defined(REG_ZMM1)
782 globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1)
783 # endif
784 # if defined(REG_ZMM2)
785 globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2)
786 # endif
787 # if defined(REG_ZMM3)
788 globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3)
789 # endif
790 # if defined(REG_ZMM4)
791 globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4)
792 # endif
793 # if defined(REG_ZMM5)
794 globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5)
795 # endif
796 # if defined(REG_ZMM6)
797 globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6)
798 # endif
799 # endif
800 # if defined(REG_Sp)
801 globalRegMaybe Sp = Just (RealRegSingle REG_Sp)
802 # endif
803 # if defined(REG_Lng1)
804 globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1)
805 # endif
806 # if defined(REG_Lng2)
807 globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2)
808 # endif
809 # if defined(REG_SpLim)
810 globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim)
811 # endif
812 # if defined(REG_Hp)
813 globalRegMaybe Hp = Just (RealRegSingle REG_Hp)
814 # endif
815 # if defined(REG_HpLim)
816 globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim)
817 # endif
818 # if defined(REG_CurrentTSO)
819 globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO)
820 # endif
821 # if defined(REG_CurrentNursery)
822 globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery)
823 # endif
824 # if defined(REG_MachSp)
825 globalRegMaybe MachSp = Just (RealRegSingle REG_MachSp)
826 # endif
827 globalRegMaybe _ = Nothing
828 #elif defined(MACHREGS_NO_REGS)
829 globalRegMaybe _ = Nothing
830 #else
831 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
832 #endif
833
834 freeReg :: RegNo -> Bool
835
836 #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
837
838 # if defined(MACHREGS_i386)
839 freeReg esp = False -- %esp is the C stack pointer
840 freeReg esi = False -- Note [esi/edi/ebp not allocatable]
841 freeReg edi = False
842 freeReg ebp = False
843 # endif
844 # if defined(MACHREGS_x86_64)
845 freeReg rsp = False -- %rsp is the C stack pointer
846 # endif
847
848 {-
849 Note [esi/edi/ebp not allocatable]
850
851 %esi is mapped to R1, so %esi would normally be allocatable while it
852 is not being used for R1. However, %esi has no 8-bit version on x86,
853 and the linear register allocator is not sophisticated enough to
854 handle this irregularity (we need more RegClasses). The
855 graph-colouring allocator also cannot handle this - it was designed
856 with more flexibility in mind, but the current implementation is
857 restricted to the same set of classes as the linear allocator.
858
859 Hence, on x86 esi, edi and ebp are treated as not allocatable.
860 -}
861
862 -- split patterns in two functions to prevent overlaps
863 freeReg r = freeRegBase r
864
865 freeRegBase :: RegNo -> Bool
866 # if defined(REG_Base)
867 freeRegBase REG_Base = False
868 # endif
869 # if defined(REG_Sp)
870 freeRegBase REG_Sp = False
871 # endif
872 # if defined(REG_SpLim)
873 freeRegBase REG_SpLim = False
874 # endif
875 # if defined(REG_Hp)
876 freeRegBase REG_Hp = False
877 # endif
878 # if defined(REG_HpLim)
879 freeRegBase REG_HpLim = False
880 # endif
881 -- All other regs are considered to be "free", because we can track
882 -- their liveness accurately.
883 freeRegBase _ = True
884
885 #elif defined(MACHREGS_powerpc)
886
887 freeReg 0 = False -- Used by code setting the back chain pointer
888 -- in stack reallocations on Linux.
889 -- Moreover r0 is not usable in all insns.
890 freeReg 1 = False -- The Stack Pointer
891 -- most ELF PowerPC OSes use r2 as a TOC pointer
892 freeReg 2 = False
893 freeReg 13 = False -- reserved for system thread ID on 64 bit
894 -- at least linux in -fPIC relies on r30 in PLT stubs
895 freeReg 30 = False
896 {- TODO: reserve r13 on 64 bit systems only and r30 on 32 bit respectively.
897 For now we use r30 on 64 bit and r13 on 32 bit as a temporary register
898 in stack handling code. See compiler/nativeGen/PPC/Instr.hs.
899
900 Later we might want to reserve r13 and r30 only where it is required.
901 Then use r12 as temporary register, which is also what the C ABI does.
902 -}
903
904 # if defined(REG_Base)
905 freeReg REG_Base = False
906 # endif
907 # if defined(REG_R1)
908 freeReg REG_R1 = False
909 # endif
910 # if defined(REG_R2)
911 freeReg REG_R2 = False
912 # endif
913 # if defined(REG_R3)
914 freeReg REG_R3 = False
915 # endif
916 # if defined(REG_R4)
917 freeReg REG_R4 = False
918 # endif
919 # if defined(REG_R5)
920 freeReg REG_R5 = False
921 # endif
922 # if defined(REG_R6)
923 freeReg REG_R6 = False
924 # endif
925 # if defined(REG_R7)
926 freeReg REG_R7 = False
927 # endif
928 # if defined(REG_R8)
929 freeReg REG_R8 = False
930 # endif
931 # if defined(REG_R9)
932 freeReg REG_R9 = False
933 # endif
934 # if defined(REG_R10)
935 freeReg REG_R10 = False
936 # endif
937 # if defined(REG_F1)
938 freeReg REG_F1 = False
939 # endif
940 # if defined(REG_F2)
941 freeReg REG_F2 = False
942 # endif
943 # if defined(REG_F3)
944 freeReg REG_F3 = False
945 # endif
946 # if defined(REG_F4)
947 freeReg REG_F4 = False
948 # endif
949 # if defined(REG_F5)
950 freeReg REG_F5 = False
951 # endif
952 # if defined(REG_F6)
953 freeReg REG_F6 = False
954 # endif
955 # if defined(REG_D1)
956 freeReg REG_D1 = False
957 # endif
958 # if defined(REG_D2)
959 freeReg REG_D2 = False
960 # endif
961 # if defined(REG_D3)
962 freeReg REG_D3 = False
963 # endif
964 # if defined(REG_D4)
965 freeReg REG_D4 = False
966 # endif
967 # if defined(REG_D5)
968 freeReg REG_D5 = False
969 # endif
970 # if defined(REG_D6)
971 freeReg REG_D6 = False
972 # endif
973 # if defined(REG_Sp)
974 freeReg REG_Sp = False
975 # endif
976 # if defined(REG_Su)
977 freeReg REG_Su = False
978 # endif
979 # if defined(REG_SpLim)
980 freeReg REG_SpLim = False
981 # endif
982 # if defined(REG_Hp)
983 freeReg REG_Hp = False
984 # endif
985 # if defined(REG_HpLim)
986 freeReg REG_HpLim = False
987 # endif
988 freeReg _ = True
989
990 #elif defined(MACHREGS_sparc)
991
992 -- SPARC regs used by the OS / ABI
993 -- %g0(r0) is always zero
994 freeReg g0 = False
995
996 -- %g5(r5) - %g7(r7)
997 -- are reserved for the OS
998 freeReg g5 = False
999 freeReg g6 = False
1000 freeReg g7 = False
1001
1002 -- %o6(r14)
1003 -- is the C stack pointer
1004 freeReg o6 = False
1005
1006 -- %o7(r15)
1007 -- holds the C return address
1008 freeReg o7 = False
1009
1010 -- %i6(r30)
1011 -- is the C frame pointer
1012 freeReg i6 = False
1013
1014 -- %i7(r31)
1015 -- is used for C return addresses
1016 freeReg i7 = False
1017
1018 -- %f0(r32) - %f1(r32)
1019 -- are C floating point return regs
1020 freeReg f0 = False
1021 freeReg f1 = False
1022
1023 {-
1024 freeReg regNo
1025 -- don't release high half of double regs
1026 | regNo >= f0
1027 , regNo < NCG_FirstFloatReg
1028 , regNo `mod` 2 /= 0
1029 = False
1030 -}
1031
1032 # if defined(REG_Base)
1033 freeReg REG_Base = False
1034 # endif
1035 # if defined(REG_R1)
1036 freeReg REG_R1 = False
1037 # endif
1038 # if defined(REG_R2)
1039 freeReg REG_R2 = False
1040 # endif
1041 # if defined(REG_R3)
1042 freeReg REG_R3 = False
1043 # endif
1044 # if defined(REG_R4)
1045 freeReg REG_R4 = False
1046 # endif
1047 # if defined(REG_R5)
1048 freeReg REG_R5 = False
1049 # endif
1050 # if defined(REG_R6)
1051 freeReg REG_R6 = False
1052 # endif
1053 # if defined(REG_R7)
1054 freeReg REG_R7 = False
1055 # endif
1056 # if defined(REG_R8)
1057 freeReg REG_R8 = False
1058 # endif
1059 # if defined(REG_R9)
1060 freeReg REG_R9 = False
1061 # endif
1062 # if defined(REG_R10)
1063 freeReg REG_R10 = False
1064 # endif
1065 # if defined(REG_F1)
1066 freeReg REG_F1 = False
1067 # endif
1068 # if defined(REG_F2)
1069 freeReg REG_F2 = False
1070 # endif
1071 # if defined(REG_F3)
1072 freeReg REG_F3 = False
1073 # endif
1074 # if defined(REG_F4)
1075 freeReg REG_F4 = False
1076 # endif
1077 # if defined(REG_F5)
1078 freeReg REG_F5 = False
1079 # endif
1080 # if defined(REG_F6)
1081 freeReg REG_F6 = False
1082 # endif
1083 # if defined(REG_D1)
1084 freeReg REG_D1 = False
1085 # endif
1086 # if defined(REG_D1_2)
1087 freeReg REG_D1_2 = False
1088 # endif
1089 # if defined(REG_D2)
1090 freeReg REG_D2 = False
1091 # endif
1092 # if defined(REG_D2_2)
1093 freeReg REG_D2_2 = False
1094 # endif
1095 # if defined(REG_D3)
1096 freeReg REG_D3 = False
1097 # endif
1098 # if defined(REG_D3_2)
1099 freeReg REG_D3_2 = False
1100 # endif
1101 # if defined(REG_D4)
1102 freeReg REG_D4 = False
1103 # endif
1104 # if defined(REG_D4_2)
1105 freeReg REG_D4_2 = False
1106 # endif
1107 # if defined(REG_D5)
1108 freeReg REG_D5 = False
1109 # endif
1110 # if defined(REG_D5_2)
1111 freeReg REG_D5_2 = False
1112 # endif
1113 # if defined(REG_D6)
1114 freeReg REG_D6 = False
1115 # endif
1116 # if defined(REG_D6_2)
1117 freeReg REG_D6_2 = False
1118 # endif
1119 # if defined(REG_Sp)
1120 freeReg REG_Sp = False
1121 # endif
1122 # if defined(REG_Su)
1123 freeReg REG_Su = False
1124 # endif
1125 # if defined(REG_SpLim)
1126 freeReg REG_SpLim = False
1127 # endif
1128 # if defined(REG_Hp)
1129 freeReg REG_Hp = False
1130 # endif
1131 # if defined(REG_HpLim)
1132 freeReg REG_HpLim = False
1133 # endif
1134 freeReg _ = True
1135
1136 #else
1137
1138 freeReg = panic "freeReg not defined for this platform"
1139
1140 #endif
1141