Delete FastBool
[ghc.git] / compiler / nativeGen / SPARC / Regs.hs
1 -- -----------------------------------------------------------------------------
2 --
3 -- (c) The University of Glasgow 1994-2004
4 --
5 -- -----------------------------------------------------------------------------
6
7 module SPARC.Regs (
8 -- registers
9 showReg,
10 virtualRegSqueeze,
11 realRegSqueeze,
12 classOfRealReg,
13 allRealRegs,
14
15 -- machine specific info
16 gReg, iReg, lReg, oReg, fReg,
17 fp, sp, g0, g1, g2, o0, o1, f0, f1, f6, f8, f22, f26, f27,
18
19 -- allocatable
20 allocatableRegs,
21
22 -- args
23 argRegs,
24 allArgRegs,
25 callClobberedRegs,
26
27 --
28 mkVirtualReg,
29 regDotColor
30 )
31
32 where
33
34
35 import CodeGen.Platform.SPARC
36 import Reg
37 import RegClass
38 import Format
39
40 import Unique
41 import Outputable
42 import FastTypes
43
44 {-
45 The SPARC has 64 registers of interest; 32 integer registers and 32
46 floating point registers. The mapping of STG registers to SPARC
47 machine registers is defined in StgRegs.h. We are, of course,
48 prepared for any eventuality.
49
50 The whole fp-register pairing thing on sparcs is a huge nuisance. See
51 includes/stg/MachRegs.h for a description of what's going on
52 here.
53 -}
54
55
56 -- | Get the standard name for the register with this number.
57 showReg :: RegNo -> String
58 showReg n
59 | n >= 0 && n < 8 = "%g" ++ show n
60 | n >= 8 && n < 16 = "%o" ++ show (n-8)
61 | n >= 16 && n < 24 = "%l" ++ show (n-16)
62 | n >= 24 && n < 32 = "%i" ++ show (n-24)
63 | n >= 32 && n < 64 = "%f" ++ show (n-32)
64 | otherwise = panic "SPARC.Regs.showReg: unknown sparc register"
65
66
67 -- Get the register class of a certain real reg
68 classOfRealReg :: RealReg -> RegClass
69 classOfRealReg reg
70 = case reg of
71 RealRegSingle i
72 | i < 32 -> RcInteger
73 | otherwise -> RcFloat
74
75 RealRegPair{} -> RcDouble
76
77
78 -- | regSqueeze_class reg
79 -- Calculuate the maximum number of register colors that could be
80 -- denied to a node of this class due to having this reg
81 -- as a neighbour.
82 --
83 {-# INLINE virtualRegSqueeze #-}
84 virtualRegSqueeze :: RegClass -> VirtualReg -> FastInt
85
86 virtualRegSqueeze cls vr
87 = case cls of
88 RcInteger
89 -> case vr of
90 VirtualRegI{} -> _ILIT(1)
91 VirtualRegHi{} -> _ILIT(1)
92 _other -> _ILIT(0)
93
94 RcFloat
95 -> case vr of
96 VirtualRegF{} -> _ILIT(1)
97 VirtualRegD{} -> _ILIT(2)
98 _other -> _ILIT(0)
99
100 RcDouble
101 -> case vr of
102 VirtualRegF{} -> _ILIT(1)
103 VirtualRegD{} -> _ILIT(1)
104 _other -> _ILIT(0)
105
106 _other -> _ILIT(0)
107
108 {-# INLINE realRegSqueeze #-}
109 realRegSqueeze :: RegClass -> RealReg -> FastInt
110
111 realRegSqueeze cls rr
112 = case cls of
113 RcInteger
114 -> case rr of
115 RealRegSingle regNo
116 | regNo < 32 -> _ILIT(1)
117 | otherwise -> _ILIT(0)
118
119 RealRegPair{} -> _ILIT(0)
120
121 RcFloat
122 -> case rr of
123 RealRegSingle regNo
124 | regNo < 32 -> _ILIT(0)
125 | otherwise -> _ILIT(1)
126
127 RealRegPair{} -> _ILIT(2)
128
129 RcDouble
130 -> case rr of
131 RealRegSingle regNo
132 | regNo < 32 -> _ILIT(0)
133 | otherwise -> _ILIT(1)
134
135 RealRegPair{} -> _ILIT(1)
136
137 _other -> _ILIT(0)
138
139 -- | All the allocatable registers in the machine,
140 -- including register pairs.
141 allRealRegs :: [RealReg]
142 allRealRegs
143 = [ (RealRegSingle i) | i <- [0..63] ]
144 ++ [ (RealRegPair i (i+1)) | i <- [32, 34 .. 62 ] ]
145
146
147 -- | Get the regno for this sort of reg
148 gReg, lReg, iReg, oReg, fReg :: Int -> RegNo
149
150 gReg x = x -- global regs
151 oReg x = (8 + x) -- output regs
152 lReg x = (16 + x) -- local regs
153 iReg x = (24 + x) -- input regs
154 fReg x = (32 + x) -- float regs
155
156
157 -- | Some specific regs used by the code generator.
158 g0, g1, g2, fp, sp, o0, o1, f0, f1, f6, f8, f22, f26, f27 :: Reg
159
160 f6 = RegReal (RealRegSingle (fReg 6))
161 f8 = RegReal (RealRegSingle (fReg 8))
162 f22 = RegReal (RealRegSingle (fReg 22))
163 f26 = RegReal (RealRegSingle (fReg 26))
164 f27 = RegReal (RealRegSingle (fReg 27))
165
166 -- g0 is always zero, and writes to it vanish.
167 g0 = RegReal (RealRegSingle (gReg 0))
168 g1 = RegReal (RealRegSingle (gReg 1))
169 g2 = RegReal (RealRegSingle (gReg 2))
170
171 -- FP, SP, int and float return (from C) regs.
172 fp = RegReal (RealRegSingle (iReg 6))
173 sp = RegReal (RealRegSingle (oReg 6))
174 o0 = RegReal (RealRegSingle (oReg 0))
175 o1 = RegReal (RealRegSingle (oReg 1))
176 f0 = RegReal (RealRegSingle (fReg 0))
177 f1 = RegReal (RealRegSingle (fReg 1))
178
179 -- | Produce the second-half-of-a-double register given the first half.
180 {-
181 fPair :: Reg -> Maybe Reg
182 fPair (RealReg n)
183 | n >= 32 && n `mod` 2 == 0 = Just (RealReg (n+1))
184
185 fPair (VirtualRegD u)
186 = Just (VirtualRegHi u)
187
188 fPair reg
189 = trace ("MachInstrs.fPair: can't get high half of supposed double reg " ++ showPpr reg)
190 Nothing
191 -}
192
193
194 -- | All the regs that the register allocator can allocate to,
195 -- with the the fixed use regs removed.
196 --
197 allocatableRegs :: [RealReg]
198 allocatableRegs
199 = let isFree rr
200 = case rr of
201 RealRegSingle r -> freeReg r
202 RealRegPair r1 r2 -> freeReg r1 && freeReg r2
203 in filter isFree allRealRegs
204
205
206 -- | The registers to place arguments for function calls,
207 -- for some number of arguments.
208 --
209 argRegs :: RegNo -> [Reg]
210 argRegs r
211 = case r of
212 0 -> []
213 1 -> map (RegReal . RealRegSingle . oReg) [0]
214 2 -> map (RegReal . RealRegSingle . oReg) [0,1]
215 3 -> map (RegReal . RealRegSingle . oReg) [0,1,2]
216 4 -> map (RegReal . RealRegSingle . oReg) [0,1,2,3]
217 5 -> map (RegReal . RealRegSingle . oReg) [0,1,2,3,4]
218 6 -> map (RegReal . RealRegSingle . oReg) [0,1,2,3,4,5]
219 _ -> panic "MachRegs.argRegs(sparc): don't know about >6 arguments!"
220
221
222 -- | All all the regs that could possibly be returned by argRegs
223 --
224 allArgRegs :: [Reg]
225 allArgRegs
226 = map (RegReal . RealRegSingle) [oReg i | i <- [0..5]]
227
228
229 -- These are the regs that we cannot assume stay alive over a C call.
230 -- TODO: Why can we assume that o6 isn't clobbered? -- BL 2009/02
231 --
232 callClobberedRegs :: [Reg]
233 callClobberedRegs
234 = map (RegReal . RealRegSingle)
235 ( oReg 7 :
236 [oReg i | i <- [0..5]] ++
237 [gReg i | i <- [1..7]] ++
238 [fReg i | i <- [0..31]] )
239
240
241
242 -- | Make a virtual reg with this format.
243 mkVirtualReg :: Unique -> Format -> VirtualReg
244 mkVirtualReg u format
245 | not (isFloatFormat format)
246 = VirtualRegI u
247
248 | otherwise
249 = case format of
250 FF32 -> VirtualRegF u
251 FF64 -> VirtualRegD u
252 _ -> panic "mkVReg"
253
254
255 regDotColor :: RealReg -> SDoc
256 regDotColor reg
257 = case classOfRealReg reg of
258 RcInteger -> text "blue"
259 RcFloat -> text "red"
260 _other -> text "green"