includes/CodeGen.Platform.hs

   1
   2 import CmmExpr
   3 #if !(MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc)
   4 import Panic
   5 #endif
   6 import Reg
   7
   8 #include "ghcautoconf.h"
   9 #include "stg/MachRegs.h"
  10
  11 #if MACHREGS_i386 || MACHREGS_x86_64
  12
  13 # if MACHREGS_i386
  14 #  define eax 0
  15 #  define ebx 1
  16 #  define ecx 2
  17 #  define edx 3
  18 #  define esi 4
  19 #  define edi 5
  20 #  define ebp 6
  21 #  define esp 7
  22 # endif
  23
  24 # if MACHREGS_x86_64
  25 #  define rax   0
  26 #  define rbx   1
  27 #  define rcx   2
  28 #  define rdx   3
  29 #  define rsi   4
  30 #  define rdi   5
  31 #  define rbp   6
  32 #  define rsp   7
  33 #  define r8    8
  34 #  define r9    9
  35 #  define r10   10
  36 #  define r11   11
  37 #  define r12   12
  38 #  define r13   13
  39 #  define r14   14
  40 #  define r15   15
  41 # endif
  42
  43 # define fake0 16
  44 # define fake1 17
  45 # define fake2 18
  46 # define fake3 19
  47 # define fake4 20
  48 # define fake5 21
  49
  50 # define xmm0  24
  51 # define xmm1  25
  52 # define xmm2  26
  53 # define xmm3  27
  54 # define xmm4  28
  55 # define xmm5  29
  56 # define xmm6  30
  57 # define xmm7  31
  58 # define xmm8  32
  59 # define xmm9  33
  60 # define xmm10 34
  61 # define xmm11 35
  62 # define xmm12 36
  63 # define xmm13 37
  64 # define xmm14 38
  65 # define xmm15 39
  66
  67 # define ymm0  40
  68 # define ymm1  41
  69 # define ymm2  42
  70 # define ymm3  43
  71 # define ymm4  44
  72 # define ymm5  45
  73 # define ymm6  46
  74 # define ymm7  47
  75 # define ymm8  48
  76 # define ymm9  49
  77 # define ymm10 50
  78 # define ymm11 51
  79 # define ymm12 52
  80 # define ymm13 53
  81 # define ymm14 54
  82 # define ymm15 55
  83
  84 # define zmm0  56
  85 # define zmm1  57
  86 # define zmm2  58
  87 # define zmm3  59
  88 # define zmm4  60
  89 # define zmm5  61
  90 # define zmm6  62
  91 # define zmm7  63
  92 # define zmm8  64
  93 # define zmm9  65
  94 # define zmm10 66
  95 # define zmm11 67
  96 # define zmm12 68
  97 # define zmm13 69
  98 # define zmm14 70
  99 # define zmm15 71
 100
 101 -- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs.
 102 -- Since it's only used to check 'isJust', the actual values don't matter, thus
 103 -- I'm not sure if these are the correct numberings.
 104 -- Normally, the register names are just stringified as part of the REG() macro
 105
 106 #elif MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
 107
 108 # define r0 0
 109 # define r1 1
 110 # define r2 2
 111 # define r3 3
 112 # define r4 4
 113 # define r5 5
 114 # define r6 6
 115 # define r7 7
 116 # define r8 8
 117 # define r9 9
 118 # define r10 10
 119 # define r11 11
 120 # define r12 12
 121 # define r13 13
 122 # define r14 14
 123 # define r15 15
 124 # define r16 16
 125 # define r17 17
 126 # define r18 18
 127 # define r19 19
 128 # define r20 20
 129 # define r21 21
 130 # define r22 22
 131 # define r23 23
 132 # define r24 24
 133 # define r25 25
 134 # define r26 26
 135 # define r27 27
 136 # define r28 28
 137 # define r29 29
 138 # define r30 30
 139 # define r31 31
 140
 141 -- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe
 142 -- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG.
 143 #if MACHREGS_aarch64 || MACHREGS_arm
 144 # define s0 32
 145 # define s1 33
 146 # define s2 34
 147 # define s3 35
 148 # define s4 36
 149 # define s5 37
 150 # define s6 38
 151 # define s7 39
 152 # define s8 40
 153 # define s9 41
 154 # define s10 42
 155 # define s11 43
 156 # define s12 44
 157 # define s13 45
 158 # define s14 46
 159 # define s15 47
 160 # define s16 48
 161 # define s17 49
 162 # define s18 50
 163 # define s19 51
 164 # define s20 52
 165 # define s21 53
 166 # define s22 54
 167 # define s23 55
 168 # define s24 56
 169 # define s25 57
 170 # define s26 58
 171 # define s27 59
 172 # define s28 60
 173 # define s29 61
 174 # define s30 62
 175 # define s31 63
 176
 177 # define d0 32
 178 # define d1 33
 179 # define d2 34
 180 # define d3 35
 181 # define d4 36
 182 # define d5 37
 183 # define d6 38
 184 # define d7 39
 185 # define d8 40
 186 # define d9 41
 187 # define d10 42
 188 # define d11 43
 189 # define d12 44
 190 # define d13 45
 191 # define d14 46
 192 # define d15 47
 193 # define d16 48
 194 # define d17 49
 195 # define d18 50
 196 # define d19 51
 197 # define d20 52
 198 # define d21 53
 199 # define d22 54
 200 # define d23 55
 201 # define d24 56
 202 # define d25 57
 203 # define d26 58
 204 # define d27 59
 205 # define d28 60
 206 # define d29 61
 207 # define d30 62
 208 # define d31 63
 209 #endif
 210
 211 # if MACHREGS_darwin
 212 #  define f0  32
 213 #  define f1  33
 214 #  define f2  34
 215 #  define f3  35
 216 #  define f4  36
 217 #  define f5  37
 218 #  define f6  38
 219 #  define f7  39
 220 #  define f8  40
 221 #  define f9  41
 222 #  define f10 42
 223 #  define f11 43
 224 #  define f12 44
 225 #  define f13 45
 226 #  define f14 46
 227 #  define f15 47
 228 #  define f16 48
 229 #  define f17 49
 230 #  define f18 50
 231 #  define f19 51
 232 #  define f20 52
 233 #  define f21 53
 234 #  define f22 54
 235 #  define f23 55
 236 #  define f24 56
 237 #  define f25 57
 238 #  define f26 58
 239 #  define f27 59
 240 #  define f28 60
 241 #  define f29 61
 242 #  define f30 62
 243 #  define f31 63
 244 # else
 245 #  define fr0  32
 246 #  define fr1  33
 247 #  define fr2  34
 248 #  define fr3  35
 249 #  define fr4  36
 250 #  define fr5  37
 251 #  define fr6  38
 252 #  define fr7  39
 253 #  define fr8  40
 254 #  define fr9  41
 255 #  define fr10 42
 256 #  define fr11 43
 257 #  define fr12 44
 258 #  define fr13 45
 259 #  define fr14 46
 260 #  define fr15 47
 261 #  define fr16 48
 262 #  define fr17 49
 263 #  define fr18 50
 264 #  define fr19 51
 265 #  define fr20 52
 266 #  define fr21 53
 267 #  define fr22 54
 268 #  define fr23 55
 269 #  define fr24 56
 270 #  define fr25 57
 271 #  define fr26 58
 272 #  define fr27 59
 273 #  define fr28 60
 274 #  define fr29 61
 275 #  define fr30 62
 276 #  define fr31 63
 277 # endif
 278
 279 #elif MACHREGS_sparc
 280
 281 # define g0  0
 282 # define g1  1
 283 # define g2  2
 284 # define g3  3
 285 # define g4  4
 286 # define g5  5
 287 # define g6  6
 288 # define g7  7
 289
 290 # define o0  8
 291 # define o1  9
 292 # define o2  10
 293 # define o3  11
 294 # define o4  12
 295 # define o5  13
 296 # define o6  14
 297 # define o7  15
 298
 299 # define l0  16
 300 # define l1  17
 301 # define l2  18
 302 # define l3  19
 303 # define l4  20
 304 # define l5  21
 305 # define l6  22
 306 # define l7  23
 307
 308 # define i0  24
 309 # define i1  25
 310 # define i2  26
 311 # define i3  27
 312 # define i4  28
 313 # define i5  29
 314 # define i6  30
 315 # define i7  31
 316
 317 # define f0  32
 318 # define f1  33
 319 # define f2  34
 320 # define f3  35
 321 # define f4  36
 322 # define f5  37
 323 # define f6  38
 324 # define f7  39
 325 # define f8  40
 326 # define f9  41
 327 # define f10 42
 328 # define f11 43
 329 # define f12 44
 330 # define f13 45
 331 # define f14 46
 332 # define f15 47
 333 # define f16 48
 334 # define f17 49
 335 # define f18 50
 336 # define f19 51
 337 # define f20 52
 338 # define f21 53
 339 # define f22 54
 340 # define f23 55
 341 # define f24 56
 342 # define f25 57
 343 # define f26 58
 344 # define f27 59
 345 # define f28 60
 346 # define f29 61
 347 # define f30 62
 348 # define f31 63
 349
 350 #endif
 351
 352 callerSaves :: GlobalReg -> Bool
 353 #ifdef CALLER_SAVES_Base
 354 callerSaves BaseReg           = True
 355 #endif
 356 #ifdef CALLER_SAVES_R1
 357 callerSaves (VanillaReg 1 _)  = True
 358 #endif
 359 #ifdef CALLER_SAVES_R2
 360 callerSaves (VanillaReg 2 _)  = True
 361 #endif
 362 #ifdef CALLER_SAVES_R3
 363 callerSaves (VanillaReg 3 _)  = True
 364 #endif
 365 #ifdef CALLER_SAVES_R4
 366 callerSaves (VanillaReg 4 _)  = True
 367 #endif
 368 #ifdef CALLER_SAVES_R5
 369 callerSaves (VanillaReg 5 _)  = True
 370 #endif
 371 #ifdef CALLER_SAVES_R6
 372 callerSaves (VanillaReg 6 _)  = True
 373 #endif
 374 #ifdef CALLER_SAVES_R7
 375 callerSaves (VanillaReg 7 _)  = True
 376 #endif
 377 #ifdef CALLER_SAVES_R8
 378 callerSaves (VanillaReg 8 _)  = True
 379 #endif
 380 #ifdef CALLER_SAVES_R9
 381 callerSaves (VanillaReg 9 _)  = True
 382 #endif
 383 #ifdef CALLER_SAVES_R10
 384 callerSaves (VanillaReg 10 _) = True
 385 #endif
 386 #ifdef CALLER_SAVES_F1
 387 callerSaves (FloatReg 1)      = True
 388 #endif
 389 #ifdef CALLER_SAVES_F2
 390 callerSaves (FloatReg 2)      = True
 391 #endif
 392 #ifdef CALLER_SAVES_F3
 393 callerSaves (FloatReg 3)      = True
 394 #endif
 395 #ifdef CALLER_SAVES_F4
 396 callerSaves (FloatReg 4)      = True
 397 #endif
 398 #ifdef CALLER_SAVES_F5
 399 callerSaves (FloatReg 5)      = True
 400 #endif
 401 #ifdef CALLER_SAVES_F6
 402 callerSaves (FloatReg 6)      = True
 403 #endif
 404 #ifdef CALLER_SAVES_D1
 405 callerSaves (DoubleReg 1)     = True
 406 #endif
 407 #ifdef CALLER_SAVES_D2
 408 callerSaves (DoubleReg 2)     = True
 409 #endif
 410 #ifdef CALLER_SAVES_D3
 411 callerSaves (DoubleReg 3)     = True
 412 #endif
 413 #ifdef CALLER_SAVES_D4
 414 callerSaves (DoubleReg 4)     = True
 415 #endif
 416 #ifdef CALLER_SAVES_D5
 417 callerSaves (DoubleReg 5)     = True
 418 #endif
 419 #ifdef CALLER_SAVES_D6
 420 callerSaves (DoubleReg 6)     = True
 421 #endif
 422 #ifdef CALLER_SAVES_L1
 423 callerSaves (LongReg 1)       = True
 424 #endif
 425 #ifdef CALLER_SAVES_Sp
 426 callerSaves Sp                = True
 427 #endif
 428 #ifdef CALLER_SAVES_SpLim
 429 callerSaves SpLim             = True
 430 #endif
 431 #ifdef CALLER_SAVES_Hp
 432 callerSaves Hp                = True
 433 #endif
 434 #ifdef CALLER_SAVES_HpLim
 435 callerSaves HpLim             = True
 436 #endif
 437 #ifdef CALLER_SAVES_CCCS
 438 callerSaves CCCS              = True
 439 #endif
 440 #ifdef CALLER_SAVES_CurrentTSO
 441 callerSaves CurrentTSO        = True
 442 #endif
 443 #ifdef CALLER_SAVES_CurrentNursery
 444 callerSaves CurrentNursery    = True
 445 #endif
 446 callerSaves _                 = False
 447
 448 activeStgRegs :: [GlobalReg]
 449 activeStgRegs = [
 450 #ifdef REG_Base
 451     BaseReg
 452 #endif
 453 #ifdef REG_Sp
 454     ,Sp
 455 #endif
 456 #ifdef REG_Hp
 457     ,Hp
 458 #endif
 459 #ifdef REG_R1
 460     ,VanillaReg 1 VGcPtr
 461 #endif
 462 #ifdef REG_R2
 463     ,VanillaReg 2 VGcPtr
 464 #endif
 465 #ifdef REG_R3
 466     ,VanillaReg 3 VGcPtr
 467 #endif
 468 #ifdef REG_R4
 469     ,VanillaReg 4 VGcPtr
 470 #endif
 471 #ifdef REG_R5
 472     ,VanillaReg 5 VGcPtr
 473 #endif
 474 #ifdef REG_R6
 475     ,VanillaReg 6 VGcPtr
 476 #endif
 477 #ifdef REG_R7
 478     ,VanillaReg 7 VGcPtr
 479 #endif
 480 #ifdef REG_R8
 481     ,VanillaReg 8 VGcPtr
 482 #endif
 483 #ifdef REG_R9
 484     ,VanillaReg 9 VGcPtr
 485 #endif
 486 #ifdef REG_R10
 487     ,VanillaReg 10 VGcPtr
 488 #endif
 489 #ifdef REG_SpLim
 490     ,SpLim
 491 #endif
 492 #if MAX_REAL_XMM_REG != 0
 493 #ifdef REG_F1
 494     ,FloatReg 1
 495 #endif
 496 #ifdef REG_D1
 497     ,DoubleReg 1
 498 #endif
 499 #ifdef REG_XMM1
 500     ,XmmReg 1
 501 #endif
 502 #ifdef REG_YMM1
 503     ,YmmReg 1
 504 #endif
 505 #ifdef REG_ZMM1
 506     ,ZmmReg 1
 507 #endif
 508 #ifdef REG_F2
 509     ,FloatReg 2
 510 #endif
 511 #ifdef REG_D2
 512     ,DoubleReg 2
 513 #endif
 514 #ifdef REG_XMM2
 515     ,XmmReg 2
 516 #endif
 517 #ifdef REG_YMM2
 518     ,YmmReg 2
 519 #endif
 520 #ifdef REG_ZMM2
 521     ,ZmmReg 2
 522 #endif
 523 #ifdef REG_F3
 524     ,FloatReg 3
 525 #endif
 526 #ifdef REG_D3
 527     ,DoubleReg 3
 528 #endif
 529 #ifdef REG_XMM3
 530     ,XmmReg 3
 531 #endif
 532 #ifdef REG_YMM3
 533     ,YmmReg 3
 534 #endif
 535 #ifdef REG_ZMM3
 536     ,ZmmReg 3
 537 #endif
 538 #ifdef REG_F4
 539     ,FloatReg 4
 540 #endif
 541 #ifdef REG_D4
 542     ,DoubleReg 4
 543 #endif
 544 #ifdef REG_XMM4
 545     ,XmmReg 4
 546 #endif
 547 #ifdef REG_YMM4
 548     ,YmmReg 4
 549 #endif
 550 #ifdef REG_ZMM4
 551     ,ZmmReg 4
 552 #endif
 553 #ifdef REG_F5
 554     ,FloatReg 5
 555 #endif
 556 #ifdef REG_D5
 557     ,DoubleReg 5
 558 #endif
 559 #ifdef REG_XMM5
 560     ,XmmReg 5
 561 #endif
 562 #ifdef REG_YMM5
 563     ,YmmReg 5
 564 #endif
 565 #ifdef REG_ZMM5
 566     ,ZmmReg 5
 567 #endif
 568 #ifdef REG_F6
 569     ,FloatReg 6
 570 #endif
 571 #ifdef REG_D6
 572     ,DoubleReg 6
 573 #endif
 574 #ifdef REG_XMM6
 575     ,XmmReg 6
 576 #endif
 577 #ifdef REG_YMM6
 578     ,YmmReg 6
 579 #endif
 580 #ifdef REG_ZMM6
 581     ,ZmmReg 6
 582 #endif
 583 #else /* MAX_REAL_XMM_REG == 0 */
 584 #ifdef REG_F1
 585     ,FloatReg 1
 586 #endif
 587 #ifdef REG_F2
 588     ,FloatReg 2
 589 #endif
 590 #ifdef REG_F3
 591     ,FloatReg 3
 592 #endif
 593 #ifdef REG_F4
 594     ,FloatReg 4
 595 #endif
 596 #ifdef REG_F5
 597     ,FloatReg 5
 598 #endif
 599 #ifdef REG_F6
 600     ,FloatReg 6
 601 #endif
 602 #ifdef REG_D1
 603     ,DoubleReg 1
 604 #endif
 605 #ifdef REG_D2
 606     ,DoubleReg 2
 607 #endif
 608 #ifdef REG_D3
 609     ,DoubleReg 3
 610 #endif
 611 #ifdef REG_D4
 612     ,DoubleReg 4
 613 #endif
 614 #ifdef REG_D5
 615     ,DoubleReg 5
 616 #endif
 617 #ifdef REG_D6
 618     ,DoubleReg 6
 619 #endif
 620 #endif /* MAX_REAL_XMM_REG == 0 */
 621     ]
 622
 623 haveRegBase :: Bool
 624 #ifdef REG_Base
 625 haveRegBase = True
 626 #else
 627 haveRegBase = False
 628 #endif
 629
 630 --  | Returns 'Nothing' if this global register is not stored
 631 -- in a real machine register, otherwise returns @'Just' reg@, where
 632 -- reg is the machine register it is stored in.
 633 globalRegMaybe :: GlobalReg -> Maybe RealReg
 634 #if MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
 635 # ifdef REG_Base
 636 globalRegMaybe BaseReg                  = Just (RealRegSingle REG_Base)
 637 # endif
 638 # ifdef REG_R1
 639 globalRegMaybe (VanillaReg 1 _)         = Just (RealRegSingle REG_R1)
 640 # endif
 641 # ifdef REG_R2
 642 globalRegMaybe (VanillaReg 2 _)         = Just (RealRegSingle REG_R2)
 643 # endif
 644 # ifdef REG_R3
 645 globalRegMaybe (VanillaReg 3 _)         = Just (RealRegSingle REG_R3)
 646 # endif
 647 # ifdef REG_R4
 648 globalRegMaybe (VanillaReg 4 _)         = Just (RealRegSingle REG_R4)
 649 # endif
 650 # ifdef REG_R5
 651 globalRegMaybe (VanillaReg 5 _)         = Just (RealRegSingle REG_R5)
 652 # endif
 653 # ifdef REG_R6
 654 globalRegMaybe (VanillaReg 6 _)         = Just (RealRegSingle REG_R6)
 655 # endif
 656 # ifdef REG_R7
 657 globalRegMaybe (VanillaReg 7 _)         = Just (RealRegSingle REG_R7)
 658 # endif
 659 # ifdef REG_R8
 660 globalRegMaybe (VanillaReg 8 _)         = Just (RealRegSingle REG_R8)
 661 # endif
 662 # ifdef REG_R9
 663 globalRegMaybe (VanillaReg 9 _)         = Just (RealRegSingle REG_R9)
 664 # endif
 665 # ifdef REG_R10
 666 globalRegMaybe (VanillaReg 10 _)        = Just (RealRegSingle REG_R10)
 667 # endif
 668 # ifdef REG_F1
 669 globalRegMaybe (FloatReg 1)             = Just (RealRegSingle REG_F1)
 670 # endif
 671 # ifdef REG_F2
 672 globalRegMaybe (FloatReg 2)             = Just (RealRegSingle REG_F2)
 673 # endif
 674 # ifdef REG_F3
 675 globalRegMaybe (FloatReg 3)             = Just (RealRegSingle REG_F3)
 676 # endif
 677 # ifdef REG_F4
 678 globalRegMaybe (FloatReg 4)             = Just (RealRegSingle REG_F4)
 679 # endif
 680 # ifdef REG_F5
 681 globalRegMaybe (FloatReg 5)             = Just (RealRegSingle REG_F5)
 682 # endif
 683 # ifdef REG_F6
 684 globalRegMaybe (FloatReg 6)             = Just (RealRegSingle REG_F6)
 685 # endif
 686 # ifdef REG_D1
 687 globalRegMaybe (DoubleReg 1)            =
 688 #  if MACHREGS_sparc
 689                                           Just (RealRegPair REG_D1 (REG_D1 + 1))
 690 #  else
 691                                           Just (RealRegSingle REG_D1)
 692 #  endif
 693 # endif
 694 # ifdef REG_D2
 695 globalRegMaybe (DoubleReg 2)            =
 696 #  if MACHREGS_sparc
 697                                           Just (RealRegPair REG_D2 (REG_D2 + 1))
 698 #  else
 699                                           Just (RealRegSingle REG_D2)
 700 #  endif
 701 # endif
 702 # ifdef REG_D3
 703 globalRegMaybe (DoubleReg 3)            =
 704 #  if MACHREGS_sparc
 705                                           Just (RealRegPair REG_D3 (REG_D3 + 1))
 706 #  else
 707                                           Just (RealRegSingle REG_D3)
 708 #  endif
 709 # endif
 710 # ifdef REG_D4
 711 globalRegMaybe (DoubleReg 4)            =
 712 #  if MACHREGS_sparc
 713                                           Just (RealRegPair REG_D4 (REG_D4 + 1))
 714 #  else
 715                                           Just (RealRegSingle REG_D4)
 716 #  endif
 717 # endif
 718 # ifdef REG_D5
 719 globalRegMaybe (DoubleReg 5)            =
 720 #  if MACHREGS_sparc
 721                                           Just (RealRegPair REG_D5 (REG_D5 + 1))
 722 #  else
 723                                           Just (RealRegSingle REG_D5)
 724 #  endif
 725 # endif
 726 # ifdef REG_D6
 727 globalRegMaybe (DoubleReg 6)            =
 728 #  if MACHREGS_sparc
 729                                           Just (RealRegPair REG_D6 (REG_D6 + 1))
 730 #  else
 731                                           Just (RealRegSingle REG_D6)
 732 #  endif
 733 # endif
 734 # if MAX_REAL_XMM_REG != 0
 735 #  ifdef REG_XMM1
 736 globalRegMaybe (XmmReg 1)               = Just (RealRegSingle REG_XMM1)
 737 #  endif
 738 #  ifdef REG_XMM2
 739 globalRegMaybe (XmmReg 2)               = Just (RealRegSingle REG_XMM2)
 740 #  endif
 741 #  ifdef REG_XMM3
 742 globalRegMaybe (XmmReg 3)               = Just (RealRegSingle REG_XMM3)
 743 #  endif
 744 #  ifdef REG_XMM4
 745 globalRegMaybe (XmmReg 4)               = Just (RealRegSingle REG_XMM4)
 746 #  endif
 747 #  ifdef REG_XMM5
 748 globalRegMaybe (XmmReg 5)               = Just (RealRegSingle REG_XMM5)
 749 #  endif
 750 #  ifdef REG_XMM6
 751 globalRegMaybe (XmmReg 6)               = Just (RealRegSingle REG_XMM6)
 752 #  endif
 753 # endif
 754 # if MAX_REAL_YMM_REG != 0
 755 #  ifdef REG_YMM1
 756 globalRegMaybe (YmmReg 1)               = Just (RealRegSingle REG_YMM1)
 757 #  endif
 758 #  ifdef REG_YMM2
 759 globalRegMaybe (YmmReg 2)               = Just (RealRegSingle REG_YMM2)
 760 #  endif
 761 #  ifdef REG_YMM3
 762 globalRegMaybe (YmmReg 3)               = Just (RealRegSingle REG_YMM3)
 763 #  endif
 764 #  ifdef REG_YMM4
 765 globalRegMaybe (YmmReg 4)               = Just (RealRegSingle REG_YMM4)
 766 #  endif
 767 #  ifdef REG_YMM5
 768 globalRegMaybe (YmmReg 5)               = Just (RealRegSingle REG_YMM5)
 769 #  endif
 770 #  ifdef REG_YMM6
 771 globalRegMaybe (YmmReg 6)               = Just (RealRegSingle REG_YMM6)
 772 #  endif
 773 # endif
 774 # if MAX_REAL_ZMM_REG != 0
 775 #  ifdef REG_ZMM1
 776 globalRegMaybe (ZmmReg 1)               = Just (RealRegSingle REG_ZMM1)
 777 #  endif
 778 #  ifdef REG_ZMM2
 779 globalRegMaybe (ZmmReg 2)               = Just (RealRegSingle REG_ZMM2)
 780 #  endif
 781 #  ifdef REG_ZMM3
 782 globalRegMaybe (ZmmReg 3)               = Just (RealRegSingle REG_ZMM3)
 783 #  endif
 784 #  ifdef REG_ZMM4
 785 globalRegMaybe (ZmmReg 4)               = Just (RealRegSingle REG_ZMM4)
 786 #  endif
 787 #  ifdef REG_ZMM5
 788 globalRegMaybe (ZmmReg 5)               = Just (RealRegSingle REG_ZMM5)
 789 #  endif
 790 #  ifdef REG_ZMM6
 791 globalRegMaybe (ZmmReg 6)               = Just (RealRegSingle REG_ZMM6)
 792 #  endif
 793 # endif
 794 # ifdef REG_Sp
 795 globalRegMaybe Sp                       = Just (RealRegSingle REG_Sp)
 796 # endif
 797 # ifdef REG_Lng1
 798 globalRegMaybe (LongReg 1)              = Just (RealRegSingle REG_Lng1)
 799 # endif
 800 # ifdef REG_Lng2
 801 globalRegMaybe (LongReg 2)              = Just (RealRegSingle REG_Lng2)
 802 # endif
 803 # ifdef REG_SpLim
 804 globalRegMaybe SpLim                    = Just (RealRegSingle REG_SpLim)
 805 # endif
 806 # ifdef REG_Hp
 807 globalRegMaybe Hp                       = Just (RealRegSingle REG_Hp)
 808 # endif
 809 # ifdef REG_HpLim
 810 globalRegMaybe HpLim                    = Just (RealRegSingle REG_HpLim)
 811 # endif
 812 # ifdef REG_CurrentTSO
 813 globalRegMaybe CurrentTSO               = Just (RealRegSingle REG_CurrentTSO)
 814 # endif
 815 # ifdef REG_CurrentNursery
 816 globalRegMaybe CurrentNursery           = Just (RealRegSingle REG_CurrentNursery)
 817 # endif
 818 # ifdef REG_MachSp
 819 globalRegMaybe MachSp                   = Just (RealRegSingle REG_MachSp)
 820 # endif
 821 globalRegMaybe _                        = Nothing
 822 #elif MACHREGS_NO_REGS
 823 globalRegMaybe _ = Nothing
 824 #else
 825 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
 826 #endif
 827
 828 freeReg :: RegNo -> Bool
 829
 830 #if MACHREGS_i386 || MACHREGS_x86_64
 831
 832 # if MACHREGS_i386
 833 freeReg esp = False -- %esp is the C stack pointer
 834 freeReg esi = False -- Note [esi/edi not allocatable]
 835 freeReg edi = False
 836 # endif
 837 # if MACHREGS_x86_64
 838 freeReg rsp = False  --        %rsp is the C stack pointer
 839 # endif
 840
 841 {-
 842 Note [esi/edi not allocatable]
 843
 844 %esi is mapped to R1, so %esi would normally be allocatable while it
 845 is not being used for R1.  However, %esi has no 8-bit version on x86,
 846 and the linear register allocator is not sophisticated enough to
 847 handle this irregularity (we need more RegClasses).  The
 848 graph-colouring allocator also cannot handle this - it was designed
 849 with more flexibility in mind, but the current implementation is
 850 restricted to the same set of classes as the linear allocator.
 851
 852 Hence, on x86 esi and edi are treated as not allocatable.
 853 -}
 854
 855 -- split patterns in two functions to prevent overlaps
 856 freeReg r         = freeRegBase r
 857
 858 freeRegBase :: RegNo -> Bool
 859 # ifdef REG_Base
 860 freeRegBase REG_Base  = False
 861 # endif
 862 # ifdef REG_Sp
 863 freeRegBase REG_Sp    = False
 864 # endif
 865 # ifdef REG_SpLim
 866 freeRegBase REG_SpLim = False
 867 # endif
 868 # ifdef REG_Hp
 869 freeRegBase REG_Hp    = False
 870 # endif
 871 # ifdef REG_HpLim
 872 freeRegBase REG_HpLim = False
 873 # endif
 874 -- All other regs are considered to be "free", because we can track
 875 -- their liveness accurately.
 876 freeRegBase _ = True
 877
 878 #elif MACHREGS_powerpc
 879
 880 freeReg 0 = False -- Used by code setting the back chain pointer
 881                   -- in stack reallocations on Linux
 882                   -- r0 is not usable in all insns so also reserved
 883                   -- on Darwin.
 884 freeReg 1 = False -- The Stack Pointer
 885 # if !MACHREGS_darwin
 886 -- most non-darwin powerpc OSes use r2 as a TOC pointer or something like that
 887 freeReg 2 = False
 888 freeReg 13 = False -- reserved for system thread ID on 64 bit
 889 -- at least linux in -fPIC relies on r30 in PLT stubs
 890 freeReg 30 = False
 891 {- TODO: reserve r13 on 64 bit systems only and r30 on 32 bit respectively.
 892    For now we use r30 on 64 bit and r13 on 32 bit as a temporary register
 893    in stack handling code. See compiler/nativeGen/PPC/Ppr.hs.
 894
 895    Later we might want to reserve r13 and r30 only where it is required.
 896    Then use r12 as temporary register, which is also what the C ABI does.
 897 -}
 898
 899 # endif
 900 # ifdef REG_Base
 901 freeReg REG_Base  = False
 902 # endif
 903 # ifdef REG_R1
 904 freeReg REG_R1    = False
 905 # endif
 906 # ifdef REG_R2
 907 freeReg REG_R2    = False
 908 # endif
 909 # ifdef REG_R3
 910 freeReg REG_R3    = False
 911 # endif
 912 # ifdef REG_R4
 913 freeReg REG_R4    = False
 914 # endif
 915 # ifdef REG_R5
 916 freeReg REG_R5    = False
 917 # endif
 918 # ifdef REG_R6
 919 freeReg REG_R6    = False
 920 # endif
 921 # ifdef REG_R7
 922 freeReg REG_R7    = False
 923 # endif
 924 # ifdef REG_R8
 925 freeReg REG_R8    = False
 926 # endif
 927 # ifdef REG_R9
 928 freeReg REG_R9    = False
 929 # endif
 930 # ifdef REG_R10
 931 freeReg REG_R10   = False
 932 # endif
 933 # ifdef REG_F1
 934 freeReg REG_F1    = False
 935 # endif
 936 # ifdef REG_F2
 937 freeReg REG_F2    = False
 938 # endif
 939 # ifdef REG_F3
 940 freeReg REG_F3    = False
 941 # endif
 942 # ifdef REG_F4
 943 freeReg REG_F4    = False
 944 # endif
 945 # ifdef REG_F5
 946 freeReg REG_F5    = False
 947 # endif
 948 # ifdef REG_F6
 949 freeReg REG_F6    = False
 950 # endif
 951 # ifdef REG_D1
 952 freeReg REG_D1    = False
 953 # endif
 954 # ifdef REG_D2
 955 freeReg REG_D2    = False
 956 # endif
 957 # ifdef REG_D3
 958 freeReg REG_D3    = False
 959 # endif
 960 # ifdef REG_D4
 961 freeReg REG_D4    = False
 962 # endif
 963 # ifdef REG_D5
 964 freeReg REG_D5    = False
 965 # endif
 966 # ifdef REG_D6
 967 freeReg REG_D6    = False
 968 # endif
 969 # ifdef REG_Sp
 970 freeReg REG_Sp    = False
 971 # endif
 972 # ifdef REG_Su
 973 freeReg REG_Su    = False
 974 # endif
 975 # ifdef REG_SpLim
 976 freeReg REG_SpLim = False
 977 # endif
 978 # ifdef REG_Hp
 979 freeReg REG_Hp    = False
 980 # endif
 981 # ifdef REG_HpLim
 982 freeReg REG_HpLim = False
 983 # endif
 984 freeReg _ = True
 985
 986 #elif MACHREGS_sparc
 987
 988 -- SPARC regs used by the OS / ABI
 989 -- %g0(r0) is always zero
 990 freeReg g0  = False
 991
 992 -- %g5(r5) - %g7(r7)
 993 --  are reserved for the OS
 994 freeReg g5  = False
 995 freeReg g6  = False
 996 freeReg g7  = False
 997
 998 -- %o6(r14)
 999 --  is the C stack pointer
1000 freeReg o6  = False
1001
1002 -- %o7(r15)
1003 --  holds the C return address
1004 freeReg o7  = False
1005
1006 -- %i6(r30)
1007 --  is the C frame pointer
1008 freeReg i6  = False
1009
1010 -- %i7(r31)
1011 --  is used for C return addresses
1012 freeReg i7  = False
1013
1014 -- %f0(r32) - %f1(r32)
1015 --  are C floating point return regs
1016 freeReg f0  = False
1017 freeReg f1  = False
1018
1019 {-
1020 freeReg regNo
1021     -- don't release high half of double regs
1022     | regNo >= f0
1023     , regNo <  NCG_FirstFloatReg
1024     , regNo `mod` 2 /= 0
1025     = False
1026 -}
1027
1028 # ifdef REG_Base
1029 freeReg REG_Base  = False
1030 # endif
1031 # ifdef REG_R1
1032 freeReg REG_R1    = False
1033 # endif
1034 # ifdef REG_R2
1035 freeReg REG_R2    = False
1036 # endif
1037 # ifdef REG_R3
1038 freeReg REG_R3    = False
1039 # endif
1040 # ifdef REG_R4
1041 freeReg REG_R4    = False
1042 # endif
1043 # ifdef REG_R5
1044 freeReg REG_R5    = False
1045 # endif
1046 # ifdef REG_R6
1047 freeReg REG_R6    = False
1048 # endif
1049 # ifdef REG_R7
1050 freeReg REG_R7    = False
1051 # endif
1052 # ifdef REG_R8
1053 freeReg REG_R8    = False
1054 # endif
1055 # ifdef REG_R9
1056 freeReg REG_R9    = False
1057 # endif
1058 # ifdef REG_R10
1059 freeReg REG_R10   = False
1060 # endif
1061 # ifdef REG_F1
1062 freeReg REG_F1    = False
1063 # endif
1064 # ifdef REG_F2
1065 freeReg REG_F2    = False
1066 # endif
1067 # ifdef REG_F3
1068 freeReg REG_F3    = False
1069 # endif
1070 # ifdef REG_F4
1071 freeReg REG_F4    = False
1072 # endif
1073 # ifdef REG_F5
1074 freeReg REG_F5    = False
1075 # endif
1076 # ifdef REG_F6
1077 freeReg REG_F6    = False
1078 # endif
1079 # ifdef REG_D1
1080 freeReg REG_D1    = False
1081 # endif
1082 # ifdef REG_D1_2
1083 freeReg REG_D1_2  = False
1084 # endif
1085 # ifdef REG_D2
1086 freeReg REG_D2    = False
1087 # endif
1088 # ifdef REG_D2_2
1089 freeReg REG_D2_2  = False
1090 # endif
1091 # ifdef REG_D3
1092 freeReg REG_D3    = False
1093 # endif
1094 # ifdef REG_D3_2
1095 freeReg REG_D3_2  = False
1096 # endif
1097 # ifdef REG_D4
1098 freeReg REG_D4    = False
1099 # endif
1100 # ifdef REG_D4_2
1101 freeReg REG_D4_2  = False
1102 # endif
1103 # ifdef REG_D5
1104 freeReg REG_D5    = False
1105 # endif
1106 # ifdef REG_D5_2
1107 freeReg REG_D5_2  = False
1108 # endif
1109 # ifdef REG_D6
1110 freeReg REG_D6    = False
1111 # endif
1112 # ifdef REG_D6_2
1113 freeReg REG_D6_2  = False
1114 # endif
1115 # ifdef REG_Sp
1116 freeReg REG_Sp    = False
1117 # endif
1118 # ifdef REG_Su
1119 freeReg REG_Su    = False
1120 # endif
1121 # ifdef REG_SpLim
1122 freeReg REG_SpLim = False
1123 # endif
1124 # ifdef REG_Hp
1125 freeReg REG_Hp    = False
1126 # endif
1127 # ifdef REG_HpLim
1128 freeReg REG_HpLim = False
1129 # endif
1130 freeReg _ = True
1131
1132 #else
1133
1134 freeReg = panic "freeReg not defined for this platform"
1135
1136 #endif
1137