Move activeStgRegs into CodeGen.Platform
[ghc.git] / compiler / codeGen / CodeGen / Platform.hs
1
2 module CodeGen.Platform (callerSaves, activeStgRegs) where
3
4 import CmmExpr
5 import Platform
6
7 import qualified CodeGen.Platform.ARM as ARM
8 import qualified CodeGen.Platform.PPC as PPC
9 import qualified CodeGen.Platform.PPC_Darwin as PPC_Darwin
10 import qualified CodeGen.Platform.SPARC as SPARC
11 import qualified CodeGen.Platform.X86 as X86
12 import qualified CodeGen.Platform.X86_64 as X86_64
13 import qualified CodeGen.Platform.NoRegs as NoRegs
14
15 -- | Returns 'True' if this global register is stored in a caller-saves
16 -- machine register.
17
18 callerSaves :: Platform -> GlobalReg -> Bool
19 callerSaves platform
20 = case platformArch platform of
21 ArchX86 -> X86.callerSaves
22 ArchX86_64 -> X86_64.callerSaves
23 ArchSPARC -> SPARC.callerSaves
24 ArchARM {} -> ARM.callerSaves
25 arch
26 | arch `elem` [ArchPPC, ArchPPC_64] ->
27 case platformOS platform of
28 OSDarwin -> PPC_Darwin.callerSaves
29 _ -> PPC.callerSaves
30
31 | otherwise -> NoRegs.callerSaves
32
33 -- | Here is where the STG register map is defined for each target arch.
34 -- The order matters (for the llvm backend anyway)! We must make sure to
35 -- maintain the order here with the order used in the LLVM calling conventions.
36 -- Note that also, this isn't all registers, just the ones that are currently
37 -- possbily mapped to real registers.
38 activeStgRegs :: Platform -> [GlobalReg]
39 activeStgRegs platform
40 = case platformArch platform of
41 ArchX86 -> X86.activeStgRegs
42 ArchX86_64 -> X86_64.activeStgRegs
43 ArchSPARC -> SPARC.activeStgRegs
44 ArchARM {} -> ARM.activeStgRegs
45 arch
46 | arch `elem` [ArchPPC, ArchPPC_64] ->
47 case platformOS platform of
48 OSDarwin -> PPC_Darwin.activeStgRegs
49 _ -> PPC.activeStgRegs
50
51 | otherwise -> NoRegs.activeStgRegs
52